Multitasking For Modern GPUs


Originally GPUs were all about one thing, 3D graphics, and specifically fill-rate. Creating 3D triangles, calculating their position, coloring them in, processing the right ones (thank you tile-based deferred rending), and outputting them to the screen. Nowadays GPUs need to do more – it’s called “compute.” Indeed, we’ve been talking about running this on low-power GPUs for a long ... » read more

Reducing IR And EM Issues With Automated Via Insertion


IR drop and EM issues are significant performance and reliability detractors at advanced nodes. Adding vias is the most effective means of correction, but traditional custom scripts are difficult and time-consuming, and do not guarantee correct-by-construction vias. The Calibre YieldEnhancer PowerVia utility uses manufacturing requirements to perform automated insertion of DRC/LVS-clean vias. R... » read more

The Big Data Revolution Beautiful Servant Or Dangerous Monster?


The world is experiencing the revolution of information, humanity shifting the hegemony from science onto data. Just as the printing revolution once flooded the world with information, now cybernetic space is engulfing the entire planet with enormous amounts of information particles. We are living in an era where knowledgeability, facts, and big data have completely taken over, and control us a... » read more

Constraint-Based Verification Of Clock Domain Crossings


There are many measures of the ever-growing size and complexity of semiconductor devices: die area, transistor count, gate count, size of memories, amount of parallel processing and more. All these factors mean more time spent in design, but they also have a major impact on verification. Since virtually all industry studies show verification time and effort growing faster than design, this impa... » read more

Intelligent System Design


Electronics technology is proliferating to new, creative applications and appearing in our everyday lives. To compete, system companies are increasingly designing their own semiconductor chips, and semiconductor companies are delivering software stacks, to enable substantial differentiation of their products. This trend started in mobile devices and is now moving into cloud computing, automotiv... » read more

Blog Review: March 25


Rambus' Steven Woo checks out common memory systems that are used in the highest performance AI applications and points to the differences between on-chip memory, HBM, and GDDR. Mentor's Colin Walls considers whether software for embedded systems should be delivered as a binary library or source code and warns of some key potential issues when requesting source code. A Synopsys writer poi... » read more

Speeding Up Verification Using SystemC


Brett Cline, senior vice president at OneSpin Solutions, explains how adding formal verification into the high-level synthesis flow can reduce the time spent in optimization and debug by about two-thirds, why this needs to be done well ahead of RTL, starting with issues such as initialization, memory out of bounds and other issues that are difficult to find in simulation. » read more

Week In Review: Design, Low Power


Silicon Labs will acquire Redpine Signals' Wi-Fi and Bluetooth business, development center in Hyderabad, India, and extensive patent portfolio for $308 million in cash. Silicon Labs says the acquisition will expand the company's IoT wireless technology, including smart phone and industrial IoT, and accelerate its roadmap for Wi-Fi 6. The deal is expected to close in the second quarter of 2020.... » read more

Blog Review: March 18


Arm's Divya Prasad investigates whether power rails that are buried below the BEOL metal stack and back-side power delivery can help alleviate some of the major physical design challenges facing 3nm nodes and beyond. Rambus' Steven Woo takes a look at a Roofline model for analyzing machine learning applications that illustrates how AI applications perform on Google’s tensor processing unit... » read more

Timing Closure At 7/5nm


Mansour Amirfathi, director of application engineering at Synopsys, examines how to determine if assumptions about design are correct, how many cycles are needed for a particular operation and why this is so complicated, and what happens if signals get out of phase. » read more

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