DSA Re-Enters Litho Picture

Why this technology is getting a serious look at 5/3nm and beyond, and who’s driving it.


By Mark LaPedus and Ed Sperling

Directed self-assembly (DSA) is moving back onto the patterning radar screen amid ongoing challenges in lithography.

Intel continues to have a keen interest in DSA, while other chipmakers are taking another hard look at the technology, according to multiple industry sources. DSA isn’t like a traditional lithography technology, though. It’s a complementary patterning approach that enables fine pitches using block copolymers. In DSA, a lithography system forms a pre-defined pattern on a structure. The structure is coated with block copolymers, which then self-assemble in tiny patterns, such as contacts and lines/spaces, with dimensions at 12nm and below.

DSA resembles a multiple patterning scheme, but in theory it is less expensive than traditional techniques. Up until about three years ago, the industry was gung-ho about DSA, with plans to insert the technology anywhere from 14nm to 7nm.

That never happened. Roughly two years ago, DSA lost some momentum as the industry ran into defect issues and other challenges, preventing it from moving into high-volume manufacturing. At the same time, the industry put more resources behind extreme ultraviolet (EUV) lithography.

Today, though, DSA is making noticeable progress with some intriguing possibilities entering the picture. In just one example, Leti, along with Arkema and Brewer Science, are jointly developing next-generation DSA materials. Capable of 7nm lines and spaces, the technology could push out or eliminate the need for high-numerical aperture (high-NA) EUV, a next-generation extreme ultraviolet (EUV) lithography technology. Already in R&D, high-NA EUV is targeted for 3nm and beyond. If it appears, it will likely be an expensive solution.

The next wave of DSA materials also could enable the development of tiny contacts, nanowires and other structures. “There is a pull for the follow-on (DSA) technology,” said Laurent Pain, patterning program manager at Leti. “The key players are following the technology. Others are trying to maintain some activities around it.”

DSA always has had potential, but it must overcome several challenges to gain a foothold in the market. At leading-edge nodes, optical lithography and multiple patterning are still the workhorse technologies in the fab. And to be sure, the industry continues to throw its weight behind EUV, which is targeted for 7nm and/or 5nm and beyond.

Still, lithographers would like to have several patterning technologies in their toolbox. In fact, there is no one lithographic technique that can serve all needs for current and future requirements. So over time, DSA could fit in as complementary technology. Direct-write e-beam, EUV, optical lithography, multiple patterning, nanoimprint, and deposition/etch patterning techniques also have a place in the landscape.

What is DSA?
In traditional lithography, the process starts with a photomask. A chipmaker designs an IC, which is then translated into a file format. Then, a photomask is developed based on that format.

The photomask is a master template for a given IC design. After a mask is developed, it is shipped to the fab. The mask is placed in a lithography tool. The tool projects light through the mask, which in turn patterns the images on a wafer.

The wavelength of light determines the resolution of the images on the wafer. For example, 193nm wavelength lithography enables resolutions down to 80nm. Using various resolution enhancement techniques (RETs), the industry has extended 193nm wavelength lithography down to the 10nm and 7nm nodes.

DSA is different. The technology entered the picture in 2007, when it landed on the old International Technology Roadmap for Semiconductors (ITRS) as a potential lithographic solution. At that time, DSA became one of the so-called next-generation lithography (NGL) candidates. The other NGLs were (and still are) EUV, multi-beam e-beam and nanoimprint.

DSA is not a hardware technology. It’s a chemical-based solution using block copolymer materials called poly (MMA-co-styrene), or PS-b-PMMA. Using various process flows, PS-b-PMMA can scale to dimensions of about 11nm. For some time, the industry has been working on next-generation high-chi copolymers, which promise to scale beyond 11nm.

In both cases, DSA is a complementary technology. It works in conjunction with optical lithography, e-beam and EUV. Many of the key DSA processing steps are conducted on wafer track systems.

There are two basic types of DSA flows, graphoepitaxy and chemoepitaxy. In graphoepitaxy, the process initially resembles a traditional lithographic flow. A resist is applied on a structure and a lithography tool patterns the surface based on a pre-defined design. The pattern is then etched.

At this point, DSA differs from traditional patterning. In effect, the lithographic/etch process makes what’s called a guiding pattern or template. Then, block copolymers are applied on the guiding pattern, causing the materials to self-assemble and move into the pre-defined patterns. The structure is then etched.

In chemoepitaxy, self-assembly is guided by lithographic-determined chemical patterns.

Fig. 1: Graphoepitaxy method. Source: Dongjin Semichem/Sematech

Fig. 2: Chemoepitaxy method. Source: Dongjin Semichem

DSA sounds like a simple process, but there is an assortment of challenges. For one thing, you are dealing with polymers, which are molecules that consist of repeating structural units.

In DSA, the idea is to combine two or more different types of polymers. Let’s say you have two polymers (A and B). If you combine them, the result is a diblock copolymer (AB) with dissimilar structural chains linked by covalent bonds.

When annealed or heated, it causes a reaction between the two dissimilar copolymers (AB), which repel each other undergo a phase separation process. Then, depending on the phase, the block copolymers self-assemble into distinct morphologies, such as cylinders or lamelleas. “The resolution is related to the length of the polymer. What is really important to note is, when you have one polymer, you have only one morphology,” said Raluca Tiron, a senior scientist at Leti, in a recent presentation.

Fig. 3: Phase diagram of block copolymer. Source: Dongjin Semichem

DSA is used for contacts, line/space and other apps. To enable fine lines and spaces, for example, the technology resembles pitch splitting in conventional lithography, where you sub-divide a structure into smaller features.

DSA uses a chemical process to accomplish the same thing. This is called frequency multiplication in DSA. For example, you take a copolymer with a period of L0 at 40nm. After a 4X multiplication process, you end up with 20nm lines and spaces.

The potential of DSA prompted a wave of excitement about 5 to 10 years ago. At the time, GlobalFoundries, Intel, Micron, Samsung and TSMC were exploring DSA in the lab, as it promised to solve many of the cost and complexity woes in advanced lithography.

But as the industry began to explore DSA, they found that the materials are prone to defects. It’s also hard to control the placement accuracy of the DSA materials. So with those issues in mind, chipmakers turned to more familiar multiple patterning techniques in the fab, such as self-aligned double/quadruple patterning (SADP/SAQP).

Today, the industry continues to wrestle with many of the same issues. “DSA has a lot of challenges,” said Greg McIntyre, director of the Advanced Patterning Department at Imec. “It’s not just defectivity, but also being consistent regarding the design needs and having the right design flexibility.”

Still, the industry continues to work on the technology. For years, Imec and Leti have developed DSA technologies on their respective 300mm pilot lines. Arkema, Brewer, EMD Performance Materials, IBM, TEL, TOK and others are working on DSA. In addition, chipmakers are activity engaged with DSA or watching it. And several universities continue to work on it.

“It’s not off the table yet. There are still potentially some niche applications that it makes sense for in the near term,” McIntyre said. “At Imec, our focus is primarily on enabling even more aggressive pitch scaling, like if you go below the limits of self-aligned quadruple patterning. At sub-20nm pitch, high chi DSA materials have the promise to be able to pattern these things.”

DSA apps
As before, DSA could be used as a complementary scheme for mainstream patterning. It could also be used for targeted apps like pattern healing. “DSA has made advances. DSA has some really interesting material and integration properties,” said David Fried, vice president of computational products at Coventor, a Lam Research Company. “You look at some of the results you see in the DSA literature about patterning healing. The point is that the results are interesting enough that you could see a path to it becoming a reality.”

So far, though, DSA has sat on the sidelines in the mainstream patterning arena, as the industry struggles to get EUV into production. But as chipmakers push down to 5nm and 3nm, they will have to take DSA more seriously.

In DSA, contact holes are one application. Basically, a chip has two main structures-the transistor and interconnects. The transistors serve as the switch in the device.

The interconnects consist of tiny copper wiring schemes that transfer electrical signals from one transistor to another. Chips have 10 to 15 layers of interconnects. Each layer is connected using vias.

Starting at 22nm, chipmakers added a new layer called the middle-of-line (MOL), which connects the transistor and interconnects. The MOL layer also has via-like structures.

Fig. 4: Image of chip with front-end and backend. Source: Wikipedia

To make vias, a chipmaker first patterns tiny holes or contacts on top of a structure. For this, IC vendors use traditional immersion/multi-patterning.

At each node, though, the contact is becoming smaller and harder to pattern. At 16nm/14nm, the critical dimension (CD) of the MOL contact is 25nm. At 10nm, the MOL contacts range from 10nm to 15nm.

Immersion/multi-patterning works for the contacts, but this scheme requires several process steps and precise control. So at 7nm and/or 5nm, chipmakers hope to use EUV to pattern the contacts, which, in theory, simplifies the process.

DSA is another option. Rather than using atomic layer deposition (ALD) for sidewalls and SADP/SAQP for etch at 7nm/5nm, DSA allows patterns to be grown using three basic components-block copolymers, neutral layers and guiding patterns.

Using a graphoepitaxial scheme, the first step is to pattern tiny contact holes using 193nm immersion tools on a structure. This structure serves as the guiding pattern. Then, the surface is coated with block copolymers, which self-assemble in the holes. The materials are removed, forming contact holes.

This DSA process has some issues, as unwanted residue tends to disperse on the wafer. So in response, Leti and its partners have qualified a new, third-generation PS-b-PMMA material set. The group has also developed an embedded neutral layer for the guiding pattern. “The new embedded neutral layer allows us to have neutrality on the bottom side as well as control of the contact and the residue,” Leti’s Tiron said in an interview.

Typically, DSA uses organic guiding patterns. But at times, organic templates are not stable at certain temperatures. One solution is to use an inorganic guiding pattern based on a silicon oxide material. Inorganic templates can withstand certain temperatures, reduce residue, and allows the wafer to be reworked, according to Leti.

Fig. 5: PS-b-PMMA CH DSA for Via0 patterning. Source: Leti

While DSA is a potential candidate for contacts, chipmakers appear to be more interested in the technology for line/space applications.

For this, Leti, Arkema and Brewer Science are developing two types of next-generation copolymers, usually referred to as high chi materials. “First, you can have PS-b-PMMA modified polymers. That means that one of the two blocks or both of them are chemically modified,” Tiron said. “The process is compatible with what we implement for the PS-b-PMMA polymer.”

The other option is using a silicon-containing block copolymer. “With those, you can shift the period lower and increase the resolution,” she said.

These materials are capable of 18nm and 14nm pitches. The process makes use of a chemoepitaxy flow with spacer-based patterning techniques. In this flow, 193nm immersion can be used to pattern the DSA template. To enable finer resolutions, EUV can also do the patterning.

Fig. 6: Two chemoepitaxy approaches for spacer patterning. Source: Leti

“Today, we can do 7nm line/space with DSA. 7nm line/space is the 3nm or 5nm node, depending on which foundry you are talking about,” Leti’s Pain said. “This could be a good complementary solution for EUV and to avoid high NA EUV. It could extend the current EUV generation. It could also extend 193nm immersion.”

There are some challenges, though. For the latest PS-b-PMMA polymers, the defect levels are close to the target levels. But for the new high-chi materials, there is no defect data-yet. “It’s also a new generation of materials for DSA. You need to have some new integration schemes,” Pain said.

Cycle time is another issue. “Right now, it’s about a 10-minute cycle, but we expect to get that down to 1 to 2 minutes,” said James Lamb, deputy CTO for advanced semiconductor manufacturing at Brewer Science. “This approach reduces errors and also speeds up sub-assembly. Today, one of the problems fabs are facing is they’re trying to build thick-edge masks to get the necessary resolution. With DSA, you don’t have to push the resolution so hard, and because of that, you may not even need high NA. If you can print a 22nm line with EUV, DSA can fill in everything else at 7nm and 5nm. You can set up spacing, trim etch, and use a guide to print at a different scale.”

What’s next?
Still, it’s unclear if DSA will a find place at 7nm or 5nm. At 3nm, though, every patterning strategy is on the table. “At 7nm and 7+, there will be single patterning with EUV. 5nm will require double patterning, and 3nm will require full double patterning. DSA, when the infrastructure is ready, will fit into this framework,” said Ryoung-Han Kim, Imec’s group manager for OPC/RET, mask/imaging, and test site/design automation.

It’s too early to say what will happen at 3nm. Long term, though, the industry is exploring DSA for a range of applications. “You may actually assemble a nanorod, rather than relying on patterning, when you get down to 1nm to 2nm,” said Brewer Science’s Lamb. “A solvent-based approach will be key to making structures at less than 5nm.”

In addition, the industry is also developing DSA for non-semiconductor applications. This includes the development of nanopores for DNA sequencers. Using DSA to pattern DNA origami is another futuristic app.

As before, DSA holds a lot of promise. The question is whether it will live up to its potential and re-assemble itself into the landscape.

Related Stories
Optimizing DRAM Development Using Directed Self-Assembly (DSA)
How to model the impact of DSA techniques into a full semiconductor process flow.
What Happened To DSA?
Alternative patterning technology makes incremental gains, but the big money is still behind EUV.
Looming Issues And Tradeoffs For EUV
New lithography tools will be required at 5nm, but pellicles, resists and uptime are still problematic.


GL says:

DSA is basically cheaper multi patterning if it works. It could halve the number of via masks and/or avoid spacer steps.

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