tag: SoCs

Hunting For Hardware-Related Errors In Data Centers
By Anne Meixner - 07 Feb, 2023 - Comments: 2

The semiconductor industry is urgently pursuing design, monitoring, and testing strategies to help identify and eliminate hardware defects that can cause catastrophic errors. Corrupt execution errors, also known as silent data errors, cannot be fully isolated at test — even with system-level testing — because they occur only under specific conditions. To sort out the environmental condit... » read more

Radiation Tolerance Is Not Just For Rocket Scientists
By Synopsys - 23 Nov, 2022 - Comments: 0

As technology scales, soft errors from particle radiation are becoming increasingly concerning for in-field reliability. These radiation effects are called Single Event Upsets (SEU) and the frequency of the failures due to SEUs is known as the Soft Error Rate (SER). Soft errors are failures due to external sources. By contrast, hard errors refer to actual process manufacturing defects or electr... » read more

How Low Can You Go? Pushing The Limits Of Transistors
By Synopsys - 09 Nov, 2022 - Comments: 0

Rising demand for cutting-edge mobile, IoT, and wearable devices, along with high compute demands for AI and 5G/6G communications, has driven the need for lower power systems-on-chip (SoCs). This is not only a concern for a device’s power consumption when active (dynamic power), but also when the device is not active (leakage power). This highly competitive industry provides significant rewar... » read more

Debug This! How To Simplify Coverage Analysis And Closure
By Yara Essam - 10 Oct, 2022 - Comments: 0

For years the process of ASIC and FPGA design and verification debug consisted primarily of comprehending the structure and source code of the design with waveforms showing activity over time, based on testbench stimulus. Today, functional verification is exponentially complex with the emergence of new layers of design requirements (beyond basic functionality) that did not exist years ago — f... » read more

Challenges Mount In New Autos
By John Koon - 06 Sep, 2022 - Comments: 0

Electronics are becoming the primary differentiator for carmakers, adding an array of options that can alter everything from how a vehicle's occupants interact with their surroundings to how the vehicle drives. But the infrastructure needed to support these features also raises a slew of technology and business questions for which there are no simple answers today. For example, how will new ... » read more

Power Methodology For Estimation And Optimization In The ASIC/SoC Flow
By Siemens EDA - 24 Aug, 2022 - Comments: 0

In this white paper, we’ll review the many steps of today’s common ASIC/SoC power methodologies and tool flows. We’ll then propose ways you can further optimize your power methodology to more quickly achieve your PPW goals. Please note, while we acknowledge that energy consumption in digital CMOS logic is a combination of dynamic power and leakage, to keep this white paper to a digestible... » read more

Heterogenous Integration Creating New IP Opportunities
By Brian Bailey - 19 Jul, 2022 - Comments: 0

The design IP market has long been known for constant change and evolution, but the industry trend toward heterogenous integration and chiplets is creating some new challenges and opportunities. Companies wanting to stake out a claim in this area have to be nimble, because there will be many potential standards introduced, and they are likely to change quickly as the industry explores what is r... » read more

Software Infrastructure For Silicon Lifecycle Management
By Siemens EDA - 12 Jul, 2022 - Comments: 0

Semiconductor technology continues to deliver higher levels of logic density in the era of nanometer processes. System-on-chip (SoC) teams can deliver even higher functionality when coupled with the massive integration possibilities of three-dimensional integrated circuit (3DIC) architectures. However, this growth must be matched by increases in capabilities and productivity in the collection a... » read more

Time For FMEDA Reuse?
By Stefano Lorenzini - 07 Jul, 2022 - Comments: 0

How do designers quantify safety in electronic systems? Through one or more tables called Failure Modes, Effects and Diagnostic Analysis – FMEDA. In fact, an FMEDA does not have to be a table; it could be manifested in scripts or some other form, but a table is the easiest way to think of this information. Think of an FMEDA for an IP, as the concept extends easily to a system-on-chip (SoC). T... » read more

IP Industry Transformation
By Brian Bailey - 09 Jun, 2022 - Comments: 0

The design IP industry is developing an assortment of new options and licensing schemes that could affect everything from how semiconductor companies collaborate to how ICs are designed, packaged, and brought to market. The IP market already has witnessed a sweeping shift from a "design once, use everywhere" approach, to an "architect once, customize everywhere" model, in which IP is highly ... » read more

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