With all the industry leaders now on board, big changes are expected.
For the past five years, it’s been clear that 2.5D, fan-outs and other forms of system-in-package were on the horizon. Exactly when they would arrive no one knew. The most common prediction was that the timing would depend on when one of the big chipmakers decided to go down that route. The theory was that the remainder of the industry would follow, ecosystem issues would be sorted out—particularly those involving accountability and known good die—and the rest would be history.
IBM and STMicroelectronics were the first out the door with their chips. While IBM was able to use this technology in its high-end servers, ST was never able to gain a solid footing for this approach due to cost. Instead, it opted to focus its efforts on FD-SOI, which takes a planar approach to solving the leakage current problem.
Much has changed in the past year, though. IBM (and now GlobalFoundries), AMD and now Intel are all firmly behind advanced packaging for performance reasons. OSATs such as Amkor and ASE have been working on packaging approaches for a half-dozen years or more that will lower the cost of putting together these advanced packages. Design services companies such as eSilicon and Open-Silicon are seeing business in 2.5D and advanced packaging steadily increasing. And major foundries now offer multiple options ranging from fan-outs to 2.5D stacks based upon silicon interposers.
It’s much the same with FPGA companies such as Xilinx and Altera (now part of Intel), both of which are building heterogeneous configurations based upon FGPAs and other processor cores. Xilinx’s Zynq platform includes both ARM and FPGA processors. And Marvell began rolling out its MoChi architecture last year that offers what CEO Sehat Sutardja calls an a la carte approach to chip design.
On top of that, all of the tier-one networking companies are adopting 2.5D architectures. Huawei was first out the door with a 2.5D solution from HiSilicon, but other first-tier networking chip companies are now lining up behind this technology, while the second-tier companies are waiting anxiously for the price to drop. Gaming platforms are now joining the party. And over the next several years, it’s likely that advanced packaging of some sort will infiltrate PCs and smartphones.
As with most technology shifts in the semiconductor industry, there is much anticipation and discussion about when something new will happen, and then suddenly it happens and everyone adapts. Advanced packaging is a little more complicated than that, in part because there are so many possible options—think silicon photonics, for example—and in part because not everything is proven yet. Memory on logic using through-silicon vias remains a problem, even though it makes sense on paper, because there still is no effective way to remove the heat.
But as the semiconductor industry has shown repeatedly, once viable directions are chosen they will be vetted, tested, improved and commoditized. The difference this time is there will be many more directions possible because not everything has to be done on one chip, in one process technology, or even in one place.
This is hardly just one more business-as-usual shift, though. Moving from having everything on one chip to more things on multiple chips will have major repercussions on the supply chain. And the fact that this is all happening at the onset of the Internet of Everything adds another dimension, opening the doors to a flood of new startups that could never compete in a world dominated by large SoCs.
Packaging generally wasn’t something most engineers gave much thought to in the past. But how chips are put together has far-reaching effects that go well beyond just the technology. And now that most of the big players are on board, we’re about to find out just how far.