HW weaknesses report; power stabilization at AI training data centers; electrochemical methods for nanoscale devices; LLM-based chiplet design generation; dynamic KV cache scheduling in heterogeneous memory; vertical FETs; vector-symbolic computing; AI agents for photonic IC design automation.
New technical papers recently added to Semiconductor Engineering’s library:
| Technical Paper | Research Organizations |
|---|---|
| Power Stabilization for AI Training Datacenters | Microsoft, OpenAI, NVIDIA |
| 2025 Most Important Hardware Weaknesses | Hardware CWE Special Interest Group |
| Vertical FET Optimization at Angstrom Nodes: A Comparative Study With Horizontal FET | POSTECH, Georgia Tech |
| MAHL: Multi-Agent LLM-Guided Hierarchical Chiplet Design with Adaptive Debugging | University of Minnesota – Twin Cities |
| AI Agents for Photonic Integrated Circuit Design Automation | University of Toronto, Max Planck, GDSFactory, MIT, Axiomatic_AI Inc. |
| Accelerating LLM Inference via Dynamic KV Cache Placement in Heterogeneous Memory System | Rensselaer Polytechnic Institute, IBM |
| Exploring Electrochemical Methods for Precision Stress Control in Nanoscale Devices | University of Bristol |
| Cross-Layer Design of Vector-Symbolic Computing: Bridging Cognition and Brain-Inspired Hardware Acceleration | Purdue University, Georgia Institute of Technology |
Find more semiconductor research papers here.
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