Chip Industry Week in Review

AI featured big at this week’s Design Automation Conference (DAC) in San Francisco. Dozens of companies featured AI-related tools (see product section below), as well as significant improvements to existing tools and some entirely new approaches for designing chips. Among the highlights:

• Siemens unveiled an AI-enhanced toolset for the EDA design flow that enables customers to integrate their own EDA data and create custom workflows using AI across the company’s digital implementation, signoff, and custom IC development tools. Siemens also introduced a suite of tools for planning, implementation, and management of heterogeneously integrated 2.5D/3D-IC designs, along with thermo-mechanical analysis software to identify the electrical impact of stress at the transistor level.
• Arteris introduced new software that enables IP teams to package and prepare hundreds or thousands of components for integration into a chiplet or SoC, including new, existing, or third-party IP blocks.
• Rapidus and Siemens plan to develop a reference flow and process design kit based on the Calibre platform for Rapidus’ 2nm process.

Fig. 1: DAC keynote speakers, L-R: William Chappell (Microsoft), Michaela Blott (AMD), and Jason Cong (UCLA). Source: Brian Bailey/Semiconductor Engineering

A central theme of DAC was highlighted in this week’s special report: Artificial intelligence is permeating the entire semiconductor ecosystem, forcing fundamental changes in AI chips, the design tools used to create them, and the methodologies used to ensure they will work reliably.

SEMI’s recent 300mm Fab Outlook report underscores AI as the driving force behind the chip industry’s expansion. Amongst the highlights:

• Advanced process capacity (7nm and below) is projected to increase 69% from 2024 to 2028, reaching a record 1.4 million wafers per month in 2028;
• Capital expenditure on advanced process equipment is expected to rise to US$50B by 2028, a 94% increase versus 2024, and
• Investment in 2nm and below wafer equipment is projected to double from US$19B in 2024 to US$43B in 2028.

Fig. 2: Year-over-year capacity growth by nodes. Source: SEMI

First quarter global semiconductor foundry revenue rose 12% year-over-year, to $72 billion. “AI adoption remains the centerpiece of semiconductor growth, reshaping priorities across the foundry supply chain and reinforcing TSMC and packaging players as central beneficiaries in this new wave,” stated Counterpoint’s William Li in the release.

Aiming to reduce geopolitical risks, Continental established a fabless Advanced Electronics & Semiconductor Solutions (AESS) organization to design and verify automotive chips, with GlobalFoundries acting as a manufacturing partner.

Intel announced the shutdown of its automotive business unit. The majority of employees from the division will be laid off.

Wolfspeed announced its restructuring agreement with creditors, with an official Chapter 11 bankruptcy filing in U.S. courts expected by July 1. The company expects its operations will be fully funded through post-restructure cash flow.

Earnings this week: Micron.

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Global
In-Depth
Markets and Money
Product News
Research
Education and Training
Security
Automotive
Events and Further Reading

Global

Asia:

• Huawei’s new MateBook laptop is based on 7nm technology, a sign that U.S. export restrictions may be hampering China’s advancement to the leading edge.
• China’s May exports to the U.S. decreased 80% for rare earths and 93% for rare earth magnets versus the prior year.
• SK hynix plans to build a packaging and test facility in Cheongju, South Korea, reports Business Korea.

Americas:

• Canada’s FABrIC project awarded CAD$13.4 million (~$9.8M) to 20 projects developing advanced sensors and other semiconductor products for strategic end sectors, as well as fabrication processes for photonics, MEMS, quantum, and compound semiconductors.
• Xanadu opened an advanced photonic packaging facility in Toronto, Canada, targeting ultra-low loss coupling for photonic ICs.
• SkyWater Technology expects to close its previously announced acquisition of Fab 25 on June 30.

Europe:

• The UK published its 10-year “Modern Industrial Strategy” plan, including a focus on semiconductors (page 47) and quantum (page 44). Also, the country’s new global talent task force will spend £54 million to attract researchers.
• Neuranics will build a new nanofabrication center for magnetic sensors as part of the £160 million (~$219M) Glasgow City Region Investment Zone.
• Fraunhofer’s European Test and Reliability Center (ETRC) opened in Chemnitz, Germany, focusing on development, testing, and validation of wide-bandgap ICs, chiplets, MEMS and photonics.
• Bosch will invest more than €2.5 billion to advance AI innovation by the end of 2027.

In-Depth

Semiconductor Engineering published its Systems and Design newsletter this week, featuring these top stories:

• Special Report: EDA’s Top Execs Map Out An AI-Driven Future
• Mixed Messages Complicate Mixed-Signal
• Distributing Intelligence Inside Multi-Die Assemblies
• Security Vulnerabilities Difficult To Detect In Verification Flow

More reporting this week:

• Disruptive Changes Ahead For Photomasks?

Useful resources:

• Advanced Packaging Fundamentals for Semiconductor Engineers (no-charge)
• Memory Fundamentals For Engineers

Markets and Money

Reports:

• Electricity use for commercial computing could surpass space cooling and ventilation by 2050, reports the U.S. Energy Information Administration.
• Deloitte estimates that by 2035, power demand from AI data centers in the U.S. could grow more than 30X to 123 gigawatts, up from 4 gigawatts in 2024.
• McKinsey anticipates that AI could boost R&D throughput for semiconductors by almost 60%, with design generation seeing the biggest impact.
• 3nm and 2nm nodes will account for about a third of the smartphone SoC shipments in 2026, reports Counterpoint.
• 2025 silicon wafer revenues are expected to rise 3.8% to $14 billion. TECHCET also predicts a 6.4% annual growth rate through 2029.

Fig. 3: Projected growth in silicon wafer revenue from 2024 to 2029. Source: TECHCET

Acquisitions and Collaborations:

• Nordic Semiconductor acquired Memfault, provider of an observability platform for managing large-scale deployments of connected products, including IoT device monitoring, firmware debugging, and OTA updates.
• Diamond Technologies acquired the assets of Akhan Semiconductor, including patents for diamond film systems, manufacturing methods, and substrate integration.
• Radiant Opto-Electronics acquired Inkron, a provider of optical coatings and nanostructured materials for nanoimprint lithography and inkjet processes.

Funding:

• EFFECT Photonics raised $24 million for its coherent optical communications solutions for data center and edge networks.
• Snowcap Compute launched with $23 million in funding for its superconducting computing platform for low-temperature AI, quantum, and HPC systems. The company’s board includes Pat Gelsinger.
• AllSpice raised $15 million for its electronics and PCB design collaboration platform.
• Qunnect raised $10 million for its room temperature quantum networking hardware.

Education and Training

SEMI’s blog, The Semiconductor Talent Crisis, details challenges in staffing for IC growth, including the need to add 1 million skilled works by 2030, a high turnover rate, a shortage of leaders, and declining enrollment in ECE. Of note, AI and machine learning have surpassed systems architecture as Europe’s most desired skill, including the need for software engineering specializing in embedded programmers as more important than design engineers.

Natcast launched the NSTC Top Workforce Solutions Recognition Program to promote effective semiconductor workforce development programs in the United States. The initial pilot will focus on technician certification programs in community colleges or technical training providers.  Applications will be accepted through August 25.

Amkor Technology Korea is partnering with Chonnam National University for hands-on training and R&D development of semiconductor packaging and testing in South Korea.

Canada’s Semiconductor Council released its 2025 Talent & Workforce Development Report, which showed that 70% of Canadian semiconductor companies surveyed plan to at least double in size over the next five years, but growth hinges on access to skilled talent.

Central New Mexico Community College, in collaboration with Sandia National Laboratories, will offer a 10-week Quantum Technician Bootcamp.

Research

Researchers at the Institute of Science Tokyo developed a power supply technology for 3D-integrated chips that works by employing three-dimensionally stacked computing architecture, which consists of processors placed directly above DRAM stacks. They also developed precision high-speed bonding techniques and adhesives.

Researchers from NaMLab and other universities reviewed the current state of transistor fabrication on vertical silicon nanostructures and identified the most important challenges for successful process integration.

Researchers at the University of California Santa Barbara discovered that electron-phonon interactions, which have long been considered unfavorable to electrical conduction, may play an important role in 2D semiconductor design.

TU Delft scientists observed quantum spin currents in graphene for the first time without using magnetic fields.

IMB-CNM researchers developed a new method for high-precision, low-cost fabrication of semiconductor qubits. This allows quantum processors to handle vast amounts of information in parallel, with potential application in chemical simulations, novel materials discovery, and financial optimization.

The Center for X-Ray Optics at Berkeley Lab provided updates on its research on microelectronics and EUV lithography.

Fig. 4: Bruno La Fontaine, director of the Center for X-Ray Optics. Credit: Marilyn Sargent/Berkeley Lab

Find more chip industry research here.

Security

CISA and the NSA published a joint guide that identifies the main obstacles in adopting memory safe languages. The guide includes practical solutions to address those challenges and emphasizes critical factors for organizations aiming to shift towards more secure software development methods.

The EU Member States, supported by the Commission, issued a roadmap and timeline to start using post-quantum cryptography in cybersecurity.

Videos of Three Common Weakness Enumeration Focused Sessions at VulnCon 2025 are now available:

• Hard Problems in CWE, and What it Tells us about Hard Problems in the Industry
• How Do We Leverage CVE Root Cause Mapping and CWE Data to Prevent New Vulnerabilities?
• Vulnerability Root Cause Mapping with CWE

Caspia Technologies will integrate its generative AI security platform with Siemens’ Questa One smart verification software portfolio to expand security verification capabilities.

Recent security research:

• Unified Memory Protection with Multi-Granular MAC and Integrity Tree for Heterogeneous Processors (KAIST et al.)
• SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Models (University of Florida)
• High-Performance FPGA Accelerator for the Post-quantum Signature Scheme CROSS (TU Munich et al.)
• TROJAN-GUARD: Hardware Trojans Detection Using GNN in RTL Designs (University of Connecticut et al.)

CISA issued a number of new alerts/advisories.

Product News

Europe’s X-FAB expanded its 180nm process with a new isolation class for enhanced single-photon avalanche diode (SPAD) integration, resulting in reduced chip size. SPADs are used in LiDAR, 3D imaging, sensing and quantum.

Mirabilis Design inked an OEM agreement with Cadence, which will now offer VisualSim Architect for system-level modeling, architectural exploration, and performance analysis as part of the Cadence system design portfolio.

Faraday Technology made its 10G SerDes IP available on UMC’s 22nm process technology.

xMEMS brought its fan-on-a-chip platform to XR smart glasses.

Ausdia introduced a solution to enable the use of golden SDC constraints throughout the design flow by automatically generating a new version of block-level constraints that can be used for full-chip signoff.

True Circuits debuted an ultra-low jitter digital LC PLL with a new digital control algorithm that is suited for applications such as high-speed SerDes and ADC input clocks.

Bruker installed the 15th InSight WLI 3D optical metrology system to a leading IC manufacturer, part of a larger order from this manufacturer for 27 Bruker optical metrology systems in 2025. This reflects the growing demand for high-performance metrology to support advanced packaging requirements in the latest generation AI high-performance chip manufacturing processes.

Automotive

Bosch created the first extremely compact MEMS sensor with an integrated Bluetooth Low Energy interface for measuring tire pressure.

TCS announced an expansion into the software-defined vehicle space with plans to open two auto delivery centers in Germany, in addition to an engineering center in Romania.

Tesla France was ordered by the Finance Ministry’s Competition, Consumer Affairs, and Fraud Control office to cease its deceptive commercial practices.

The global automotive lidar market will quadruple by 2030, predicts Yole. Chinese lidar suppliers account for 89% of the total market.

Auto research: Exploring Graph Neural Backdoors in Vehicular Networks: Fundamentals, Methodologies, Applications, and Future Perspectives.

Events and Further Reading

Upcoming webinars are here, including:

• Fundamentals of Tamper-Resistant Security (On-Demand)
• Protecting the Supply Chain with Secure Provisioning​
• Analysis Tools and Techniques For Smart Manufacturing Citizen Data Scientists
• Data Center RAS in the Age of AI Computing

Find upcoming chip industry events here, including:

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