Monolithic 3D integration; near-field heat transfer.
Researchers from the University of Illinois Urbana-Champaign developed a low-temperature process for monolithic 3D integration using standard single-crystalline silicon.
“Generally, the industry accepts that once the first layer of circuits is complete, the thermal budget limit for any additional layers is 400 degrees Celsius,” said Qing Cao, a materials science and engineering professor at Illinois Grainger Engineering, in a press release. “Researchers in both academia and industry have tried to get around this by working with semiconductor materials other than single-crystalline silicon for the upper layers. But the resulting devices all inevitably suffer from issues with performance and reliability.”
The process involves creating ultrathin, freestanding silicon nanomembranes from a donor wafer. These are then transferred onto the receiving substrate, which already contains completed bottom-layer circuits, using a roll laminator that requires no more than 200 degrees Celsius to generate a strong bond between the substrate and the transferred layer.
“Our method is not only easier to implement with lower cost, but it has several advantages over previous approaches to stack silicon wafers,” Cao added. “The membranes we transferred are only 10 nanometers thick or less, compared to the 500 to 700 micrometers thickness of a typical wafer. Because they are thin, these membranes are mechanically flexible to conform to the underlying surface. This conformality helps avoid interfacial defects like voids, which are common when trying to force two rigid wafers together via wafer bonding.”
In addition, to avoid the heat associated with traditional doping, the team used ‘junctionless transistors’ that are uniformly and heavily doped before layering. The films are thin enough that the gate can still control the channel effectively. To demonstrate the process, the team built three stacked layers, each containing 625 transistors, connected with vertical metal lines to create 3D logic circuits and SRAM cells. [1]
Researchers from Carnegie Mellon University, Stanford University, and Purdue University designed metamaterials that enable near-field radiative heat transfer, an effect in which heat can tunnel through electromagnetic waves across a gap of a few hundred nanometers.
“Unlike conventional materials, metamaterials are built with tiny, repeating patterns that interact with energy in precise ways,” said Sheng Shen, a professor of mechanical engineering at Carnegie Mellon University, in a press release. “We patterned microscopic gold structures onto thin membranes and positioned them face-to-face across a nanoscale gap. This increased heat transfer by as much as four times compared to similar setups without metamaterials, which is far beyond what traditional physics would predict at larger distances.”
“Rather than simply adding more pathways for heat, the gold structures interact with naturally occurring energy waves in the material, known as surface phonon polaritons, creating a resonance effect,” added Zexiao Wang, a Ph.D. student at CMU, in a statement. “These coupled vibrations allow energy to move more freely and efficiently across the gap.”
The researchers suggest that the ability to precisely control how heat flows could lead to new cooling strategies for chips and high-performance systems. [2]
[1] B. Lam, Y.M. Yu, H. Nam, et al. Monolithic three-dimensional integration of silicon transistors. Nature 654, 652–659 (2026). https://doi.org/10.1038/s41586-026-10496-6
[2] Z. Wang, R. Yu, H. Salihoglu, et al. Metamaterial-enhanced near-field radiative heat transfer. Nature 654, 64–68 (2026). https://doi.org/10.1038/s41586-026-10595-4
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