Blog Review: Jan. 25


Cadence's Shyam Sharma shares some important design and verification considerations when working with DDR5 SDRAM and DDR5 DIMM-based memory subsystems, including reset and power on initialization, speed bin compliance, and refresh, RFM, and temperature requirements. Siemens EDA's Harry Foster examines trends in adoption of languages and libraries for IC and ASIC design, testbench creation, a... » read more

Blog Review: Jan. 18


Synopsys' Dana Neustadter, Sara Zafar Jafarzadeh, and Ruud Derwig argue that we are already at an inflection point for post-quantum security because devices and infrastructure systems with longer life cycles or communicating data that must be kept confidential for an extended period need to have a path towards quantum-safe solutions. Siemens EDA's Harry Foster looks at trends in adoption of ... » read more

Week In Review: Design, Low Power


With funding from the Semiconductor Research Corporation, a group of 10 universities is banding together to create the Processing with Intelligent Storage and Memory center, or PRISM, led by University of California San Diego. The $50.5 million PRISM center will focus on four different themes: novel memory and storage devices and circuits; next generation architectures; systems and software; an... » read more

Design And Verification Methodologies Breaking Down


Tools, methodologies and flows that have been in place since the dawn of semiconductor design are breaking down, but this time there isn't a large pool of researchers coming up with potential solutions. The industry is on its own to formulate those ideas, and that will take a lot of cooperation between EDA companies, fabs, and designers, which has not been their strong point in the past. It ... » read more

Brrraaap: Full Throttle On Dirt Bike Electrification


On a dirt bike almost any terrain is fair game. Once you hit the back roads, course correcting through open fields or wooded areas to get where you’re going (or not) is easy. These powerful-yet-agile gravel-and-dirt surfing, rock-hopping machines have been identified by some as the undisputed off-road champions — perfect for exploration in places larger vehicles simply can’t go. Dirt b... » read more

Multiphysics Analysis of Traction Motors: Accelerating Innovation in Electric Mobility Solutions


Between 2021 and 2023, electric vehicles (EVs) represent a $7 trillion market opportunity, and it’s only projected to increase. In a rapidly growing EV market, automakers are turning to advanced design, testing, and manufacturing technologies. Optimized system design requires the evaluation of many different concepts, topologies, and electronic interactions across disciplines. Design and s... » read more

Blog Review: Jan. 11


Cadence's Veena Parthan explains why in CFD, understanding the consequences of choices regarding the computational mesh is essential for generating high-fidelity simulation results. Synopsys' Chris Clark shares key considerations and questions to factor in when developing solutions for software-defined vehicles that must meet safety, security, reliability, and quality standards. Siemens E... » read more

Automated Late Stage Timing-Aware Dynamic Voltage Drop ECO


One of the never-ending frustrations for electrical engineers is having to deal with counterproductive real-world effects that they wish would just go away. Examples include switch bounce, metastability, and contact resistance. For IC designers, dynamic voltage drop (DVD), also known as IR drop, is one of those unfortunate facts of the profession. There’s no way to avoid it; every trace and w... » read more

Week In Review: Design, Low Power


Top Of The News Google announced it will support the RISC-V architecture with the Android open-source operating system. In a keynote at the RISC-V Summit, Lars Bergstrom, Google's director of engineering for the Android Platform Programming Languages, noted that Android currently has more than 3 billion users and the support of more than 24,000 vendors. "We've been following RISC-V for a very ... » read more

Blog Review: Jan. 4


Siemens EDA's Harry Foster investigates the percentage of total IC/ASIC project time spent in verification and increasing engineering headcount, particularly growing demand for verification engineers. Synopsys' Stelios Diamantidis argues that retargeting older chips using AI offers a way to move chip designs between nodes and absorb the market’s excess capacity. Cadence's Paul McLellan ... » read more

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