New Transistor Structures At 3nm/2nm


Several foundries continue to develop new processes based on next-generation gate-all-around transistors, including more advanced high-mobility versions, but bringing these technologies into production is going to be difficult and expensive. Intel, Samsung, TSMC and others are laying the groundwork for the transition from today’s finFET transistors to new gate-all-around field-effect trans... » read more

An Introduction To Virtual Semiconductor Process Evaluation


Process engineers develop ideal solutions to engineering problems using a logical theoretical framework combined with logical engineering steps. Unfortunately, many process engineering problems cannot be solved with a brute force, step by step approach to understand every cause-and-effect relationship. There are simply too many process recipe variables that can be modified to make a brute-force... » read more

Hidden Costs In Faster, Low-Power AI Systems


Chipmakers are building orders of magnitude better performance and energy efficiency into smart devices, but to achieve those goals they also are making tradeoffs that will have far-reaching, long-lasting, and in some cases unknown impacts. Much of this activity is a direct result of pushing intelligence out to the edge, where it is needed to process, sort, and manage massive increases in da... » read more

A Triple-Deck CFET Structure With An Integrated SRAM Cell For The 2nm Technology Node And Beyond


A novel triple-deck CFET structure is proposed for the first time as a candidate for area scaling. The proposed triple-deck CFET aggressively stacks a pass gate over an inverter to form a half SRAM bit cell. The integration flow and full metal connectivity have been carefully designed for functionality and array assembly. Most of the pitch used in the process is around 40nm, which is patternabl... » read more

Blog Review: Dec. 23


Cadence's Paul McLellan checks out how Arm is becoming a powerhouse in the server and high-end space with the addition of new R&D and a focus on getting the most out of its architecture. Siemens EDA's Harry Foster continues his look at verification trends in FPGAs by checking out adoption of different simulation and formal technologies. Synopsys' Taylor Armerding looks ahead to 2021 w... » read more

Process Window Optimization Of DRAM By Virtual Fabrication


New integration and patterning schemes used in 3D memory and logic devices have created manufacturing and yield challenges. Industrial focus has shifted from the scaling of predictable unit processes in 2D structures to the more challenging full integration of complex 3D structures. Conventional 2D layout DRC, offline wafer metrology, and offline electrical measurements are no longer sufficient... » read more

Variation Threat In Advanced Nodes, Packages Grows


Variation is becoming a much bigger and more complex problem for chipmakers as they push to the next process nodes or into increasingly dense advanced packages, raising concerns about the functionality and reliability of individual devices, and even entire systems. In the past, almost all concerns about variation focused on the manufacturing process. What printed on a piece of silicon didn't... » read more

3D NAND’s Vertical Scaling Race


3D NAND suppliers are accelerating their efforts to move to the next technology nodes in a race against growing competition, but all of these vendors are facing an assortment of new business, manufacturing, and cost challenges. Two suppliers, Micron and SK Hynix, recently leapfrogged the competition and have taken the scaling race lead in 3D NAND. But Samsung and the Kioxia-Western Digital (... » read more

200mm Demand Surges


A surge in demand for various chips is causing shortages for select 200mm foundry capacity as well as 200mm fab equipment, and it shows no signs of abating in 2021. Foundry customers will face a shortfall of 200mm capacity at select foundries at least in the first half of 2021, and perhaps beyond. Those customers will need to plan ahead to ensure they obtain enough 200mm capacity in 2021. Ot... » read more

Process Variation Analysis of Device Performance Using Virtual Fabrication


A new methodology is demonstrated to assess the impact of fabrication inherent process variability on 14-nm fin field effect transistor (FinFET) device performance. A model of a FinFET device was built using virtual device fabrication and testing. The model was subsequently calibrated on Design of Experiment corner case data that had been collected on a limited number of processed fab wafers. W... » read more

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