tag: photomasks

We Have Reached The Tipping Point For Simulation-Based Mask Data Preparation
By Aki Fujimura - 13 Nov, 2014 - Comments: 0

Since the beginning of the semiconductor industry, mask-data preparation (MDP) and mask verification (MV) have been shape-based: each shape has been treated as an entity unto itself, and if each isolated shape was correct, the mask was correct. This context independence is a critical assumption for conventional fracturing. However, as line/space measurements (L:S) fall below 50nm, shape-ba... » read more

Executive Insight: Elmar Platzgummer
By Mark LaPedus - 13 Nov, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss photomask and lithography trends with Elmar Platzgummer, chief executive of IMS Nanofabrication, an Austrian-based supplier of multi-beam e-beam tools for mask writing applications. SE: IMS has shipped the world’s first multi-beam e-beam system. Initially targeted for photomask writing, the tools are currently being tested in the field. How lon... » read more

The Impact Of 14nm Photomask Uncertainties On Computational Lithography Solutions
By Mentor, a Siemens Business - 16 Oct, 2014 - Comments: 0

Computational lithography solutions rely upon accurate process models to faithfully represent the imaging system output for a defined set of process and design inputs. These models, in turn, rely upon the accurate representation of multiple parameters associated with the scanner and the photomask. While certain system input variables, such as scanner numerical aperture, can be empirically tuned... » read more

Executive Insight: Aki Fujimura
By Mark LaPedus - 16 Oct, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss photomask technology and lithography trends with Aki Fujimura, chairman and chief executive of D2S. SE: What are the big challenges that keep you awake at night? Fujimura: Mask technology, and the investments in the mask industry, are increasingly important. But so far, the investment dollars that the community is willing to spend on it isn’... » read more

Self-Aligned Double Patterning—Part Deux
By David Abercrombie - 14 Aug, 2014 - Comments: 0

In my last article, I introduced you to the basic Self-Aligned Double-Patterning (SADP) process that is one of the potential candidate techniques for processing metal layers at 10nm and below, but let’s have a quick recap. SADP uses a deposition and etch step process to create spacers surrounding a patterned shape (Figure 1). As you can see, there are two masking steps—the first mask is cal... » read more

Multi-beam Sees The Light
By Mark LaPedus - 19 Jun, 2014 - Comments: 2

The multiple-beam electron-beam market is going in two separate directions at once. Multi-beam for photomask writing is set to take off. The other market--multi-beam for direct-write lithography applications—is still in the early stages and remains in flux. In the multi-beam direct-write segment, for example, multiple sources indicate that KLA-Tencor is exiting this market to focus on its ... » read more

Stopping Mask Hotspots Before They Escape The Mask Shop
By eBeam Initiative - 28 Apr, 2014 - Comments: 3

By Aki Fujimura The same types of physics-based issues that have haunted lithography for decades have started to impact mask writing as well. The increasingly small and complex mask shapes specified by optical proximity correction (OPC) that are now required for faithful wafer lithography at 28nm-and-below nodes have given rise to an increase in mask hotspots. Mask hotspots occur when the shap... » read more

Blog Review: April 23
By Ed Sperling - 23 Apr, 2014 - Comments: 0

Mentor’s John Day looks backward through a smart rearview mirror from Nissan. No glare, even at night or at sunset, and a wider field of vision. You have to wonder why this technology took so long. Synopsys’ Karen Bartleson wonders when the IoT will actually arrive, given the delay in durable goods, a concern over security and the effects of government regulation. Answer: When we stop ta... » read more

Mask Hotspots Are Escaping The Mask Shop
By Various Writers - 16 Apr, 2014 - Comments: 0

Although the overwhelming majority of wafer production issues at the 28nm-and- below process nodes are lithography- and OPC-related, the semiconductor industry is starting to see problems caused by mask hotspots: wafer-level production issues that are caused when the shapes specified by optical proximity correction (OPC) are not faithfully reproduced on the mask. Mask hotspots will account for ... » read more

One-on-One: Naoya Hayashi
By Mark LaPedus - 20 Mar, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the current and future challenges in the photomask industry with Naoya Hayashi, research fellow at Dai Nippon Printing (DNP). SE: What are the big challenges for the photomask industry today? Hayashi: There are several challenges. Most of the challenges involve mask complexity. It is also quite difficult to handle the mask data, because it is ... » read more

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