tag: Synopsys

Challenges In Ramping New Manufacturing Processes
By Ed Sperling - 30 Aug, 2023 - Comments: 0

Despite a slowdown for Moore’s Law, there are more new manufacturing processes rolling out faster than ever before. The challenge now is to decrease time to yield, which involves everything from TCAD and design technology co-optimization, to refinement of power, performance, area/cost, and process control and analytics. Srinivas Raghvendra, vice president of engineering at Synopsys, talks abo... » read more

Blog Review: August 30
By Jesse Allen - 30 Aug, 2023 - Comments: 0

Siemens' Dan Yu examines hallucinations in large language models, the Universal Approximation Theorem, and the role they play in applying LLMs to EDA. Cadence's Mamta Rana introduces shared flow control in PCIe 6.0, which enables the reduced cost implementation of multiple virtual channels by allowing common sets of resources to be shared. Synopsys' Arturo Salz and Johannes Stahl note tha... » read more

New Concepts Required For Security Verification
By Brian Bailey - 28 Aug, 2023 - Comments: 0

Verification for security requires new practices in both the development and verification flows, but tools and methodologies to enable this are rudimentary today. Flows are becoming more complex, especially when they span multiple development groups. Security is special in that it is pervasive throughout the development process, requiring both positive and negative verification. Positive ver... » read more

Week In Review: Design, Low Power
By Linda Christensen - 25 Aug, 2023 - Comments: 0

Arm filed its registration statement for a highly anticipated IPO. Chip industry heavyweights Apple, Samsung, NVIDIA, and Intel are all expected to invest. Find the SEC filing here. Taiwan’s National Science and Technology Council (NSTC) laid out a 10-year initiative to bolster its IC design market share to 40% worldwide by 2033, with the first year’s budget of US $376 million. The sh... » read more

Week In Review: Auto, Security, Pervasive Computing
By Liz Allan - 25 Aug, 2023 - Comments: 0

The AI chip market is booming. Gartner expects revenue for the year will hit $53.4 billion, up 20.9% from 2022. The firm predicts that number will grow to $119 billion by 2027.  In the consumer electronics market, the value of AI-enabled application processors will amount to $1.2 billion in 2023, up from $558 million in 2022. Germany will spend nearly €1 billion (~US$1.7B) over the next t... » read more

Week In Review: Manufacturing, Test
By Karen Heyman - 25 Aug, 2023 - Comments: 0

Intel aims to quadruple capacity for its most advanced chip packaging services by 2025, including with a new facility in Malaysia, per Nikkei Asia. Huawei is building a collection of secret semiconductor fabrication facilities across China to let the company skirt U.S. sanctions, SIA warned in a presentation seen by Bloomberg. It’s acquired at least two existing plants and is building at l... » read more

Optimizing IC Designs For Real-World Use Cases
By Brian Bailey - 24 Aug, 2023 - Comments: 0

Semiconductor systems are becoming more focused on power, performance, and area for the primary scenarios they are likely to see in real-world applications, but increasingly at the expense of secondary tasks. This is happening at all levels of abstraction and all stages of the design flow. At the highest level, processors are being optimized to run a given set of software. RISC-V is one of t... » read more

AI, Rising Chip Complexity Complicate Prototyping
By Karen Heyman - 24 Aug, 2023 - Comments: 0

Prototyping, an essential technology for designing complex chips in tight market windows, is becoming significantly more challenging for the growing number of designs that include AI/ML. Prototyping remains one of the foundational pillars of the whole shift left movement, allowing software to be developed and tested before actual silicon is available. That, in turn, enables multiple teams t... » read more

Speeding Up Design Closure
By Ed Sperling - 23 Aug, 2023 - Comments: 0

Increasing complexity and smaller process nodes make it far more difficult to achieve design closure for chips. There are more physical effects to model, including noise, cross-talk, and double switching effects, all of which can slow the design process. Solaiman Rahim, vice president of engineering for Synopsys’ EDA Group, talks about why it’s so important to analyze violations in design, ... » read more

Power Supply Noise Effects On Jitter In Clock Synchronous Systems With Emphasis On Memory Interfaces
By Synopsys - 23 Aug, 2023 - Comments: 0

In today's fast-paced digital world, the performance and capacity of high-speed memory has become crucial for a wide range of applications, from personal computing devices to data centers and high-performance computing systems. Designers face challenges in optimizing their designs for speed, power efficiency, and reliability — all while ensuring robustness in the face of power supply noise. T... » read more

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