Chip Industry’s Technical Paper Roundup: Feb. 28


New technical papers recently added to Semiconductor Engineering’s library: [table id=83 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

Chip Industry’s Technical Paper Roundup: Feb. 21


New technical papers recently added to Semiconductor Engineering’s library: [table id=82 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

Automotive MCUs: Digital Twin of the LBIST Functionality


A new technical paper titled "A Novel LBIST Signature Computation Method for Automotive Microcontrollers using a Digital Twin" was written by researchers at Infineon Technologies, University of Bremen, and DFKI GmbH. Abstract "LBIST has been proven to be an effective measure for reaching functional safety goals for automotive microcontrollers. Due to a large variety of recent innovative fea... » read more

Chip Industry’s Technical Paper Roundup: Feb. 14


New technical papers recently added to Semiconductor Engineering’s library: [table id=80 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

Detecting Hardware Trojans In a RISC-V Core’s Post-Layout Phase


A new technical paper "Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans - A RISC-V Case Study" was published by researchers at University of Bremen, DFKI GmbH, and the German Aerospace Center. Abstract: "With the exponential increase in the popularity of the RISC-V ecosystem, the security of this platform must be re-evaluated especially for mission-critical and IoT d... » read more

Approximate Adders Suitable For In-Memory Computing Using a Memristor Crossbar Array


A new technical paper titled "IMAGIN: Library of IMPLY and MAGIC NOR Based Approximate Adders for In-Memory Computing" was published by researchers at DFKI (German Research Center for Artificial Intelligence) and Indian Institute of Information Technology Guwahati. "We developed a framework to generate approximate adder designs with varying output errors for 8, 12, and 16-bit adders. We imp... » read more

Chip Industry’s Technical Paper Roundup: Oct 18


New technical papers added to Semiconductor Engineering’s library this week. [table id=57 /] » read more

RISC-V Virtual Prototype


A new technical paper titled "Advanced Embedded System Modeling and Simulation in an Open Source RISC-V Virtual Prototype" was published by researchers at DFKI GmbH and University of Bremen. Abstract "RISC-V is a modern Instruction Set Architecture (ISA) that, by its open nature in combination with a clean and modular design, has enormous potential to become a game changer in the Internet o... » read more

Technical Paper Roundup: Sept 27


New technical papers added to Semiconductor Engineering’s library this week. [table id=53 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit f... » read more

Graph-Based, Formal Equivalence Checking Method


A new research paper titled "Equivalence Checking of System-Level and SPICE-Level Models of Linear Circuits" was published by researchers at University of Bremen and DFKI GmbH. Abstract: "Due to the increasing complexity of analog circuits and their integration into System-on-Chips (SoC), the analog design and verification industry would greatly benefit from an expansion of system-level met... » read more

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