GF’s new partnerships; HP’s MEMS funding; CHIPS Metrology Community; Hot Chips highlights; 1c DDR5; Accellera’s new standard; AI’s role in chip design; chiplets; more earnings.
The Biden-Harris Administration announced preliminary terms with HP for $50 million in direct funding under the CHIPs and Science Act to support the expansion and modernization of HP’s existing microfluidics and microelectromechanical systems (“MEMS”) facility in Corvallis, Oregon.
CHIPS for America launched the CHIPS Metrology Community, a collaborative initiative designed to advance metrology research and development across the semiconductor industry. The community is open to industry professionals, academia, and government agencies and will address the seven Grand Challenges outlined in the CHIPS Metrology Program.
Hot Chips 24 was held this week at Stanford University. Among the announcements:
Find more Hot Chips reporting here.
SK hynix announced the industry’s first 16Gb DDR5 memory using its 10nm process (1c) node. The company claims an operating speed of 8Gbps with a 9% power efficiency improvement over previous generations. The chip will be ready for mass production within the year for volume shipments in 2025.
AWS announced its Parallel Computing Service, which will allow customers to utilize HPC clusters to run simulations.
Accellera’s board of directors voted to approve the Portable Test and Stimulus Standard 3.0, which includes support for behavioral coverage where several scenarios can be generated from a single PSS specification, as well as many other new features.
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CSIS (Center for Strategic & International Studies) published a detailed report analyzing the future of US-EU semiconductor collaboration.
In Germany, SCHOTT AG established a new semiconductor-focused division for its glass and glass-ceramic technologies. The division will develop glass-based solutions for increased performance, thermal management, electrical isolation, and reduced energy consumption.
The Netherlands may restrict ASML‘s ability to service the company’s equipment in China, according to Bloomberg.
Chinese export controls on crucial semiconductor materials are hitting supply chains and stoking fears of shortfalls in Western production of advanced chips and military optical hardware, according to the Financial Times.
The Japanese government announced it has begun development on a successor to the country’s Fugaku supercomputer. The country aims for the computer to become the world’s first zeta-class computer for high-speed AI calculations.
Asia Times examined the rise of Vietnam as a chip-making hub, citing Infineon‘s new product development team in Hanoi, and Google’s consideration of a future data center there, among others.
Canada is launching a 100% tariff on imported China-made EVs, matching U.S. tariffs.
Micron has not yet broken ground for its planned complex in northern New York, but it already is pouring concrete in Idaho.
Semiconductor Engineering published its Systems and Design newsletter this week, featuring these top stories and video:
Also, a new Tech Talk from Semiconductor Engineering:
GF and Finwave Semiconductor are partnering. Their collaboration will focus on optimizing and scaling Finwave’s enhancement-mode (E-mode) MISHEMT technology to volume production at GF’s 200mm semiconductor manufacturing facility in Burlington, Vermont.
GF also announced a partnership with Efficient for a new high-performance computer processor, claiming to be 166X more energy-efficient than industry-standard embedded CPUs.
Qualcomm entered into a definitive agreement with Sequans to buy its 4G IoT technologies.
Japan‘s semiconductor equipment sales hit a record high in July 2024, with a 23.6% year-over-year growth, according to TrendForce. The surge in sales is attributed to increased investments in advanced manufacturing technologies, driven by global demand for semiconductors across various sectors.
Sales of advanced packaging equipment are projected to grow more than 10% in 2024, with 2025 potential growth exceeding 20%, according to TrendForce. The growth is being driven by increasing demand for Chip-on-Wafer-on-Substrate (CoWoS), Integrated Fan Out (InFO), and System on Integrated Chips (SoIC) packaging technologies.
The Wall Street Journal reported that OpenAI is in talks to raise several billion dollars in a new funding round, which would increase its value to more than $100 billion.
Chip industry earnings releases in August 2024 include:
Industry stock price impacts are here.
Purdue University and Panama signed an MoU to enhance educational opportunities and workforce development, aiming to strengthen the nation’s semiconductor industry.
Auburn University established an Electronics Packaging Research Institute (EPRI), building on semiconductor packaging research conducted through its Center of Advanced Vehicle and Extreme Environment Electronics, or CAVE3.
The U.S. National Science Foundation (NSF) awarded $2 million to Clark Atlanta University to lead the HBCU CHIPS Network, a partnership between Historically Black Colleges and Universities (HBCUs), government agencies, academia, and industry to drive semiconductor research and education.
Samsung Austin Semiconductor invested an additional $1 million into the University of Illinois at Urbana-Champaign to continue their ecosystem collaboration, which has seen the launch of Samsung Technology Track Scholarships and an undergraduate minor in semiconductor engineering.
The Institute for Policy Studies (IPS) published a report: “Leveraging the CHIPS Program to Create Good Jobs for All Semiconductor Workers.”
Recent security research:
MIT researchers proposed an algorithm to help develop novel encryption methods that can withstand the code-breaking power of quantum computers.
The U.S. Artificial Intelligence Safety Institute will formally collaborate with Anthropic and OpenAI on AI safety research, testing, and evaluation.
The U.S. Defense Advanced Research Projects Agency selected five organizations across the country to be DARPA Commercial Accelerators aimed at rapid scaling of DARPA-funded technologies.
The National Security Agency (NSA) released a digital copy of a lecture that then-Captain Grace Hopper gave agency employees on August 19, 1982 on protecting information.
The Cybersecurity and Infrastructure Security Agency (CISA) issued a number of alerts/advisories.
MLCommons announced new results for its MLPerf Inference v4.1 benchmark suite, which delivers ML system performance benchmarking.
EPFL researchers developed a miniaturized brain-machine interface capable of direct brain-to-text communication on tiny silicon chips.
Cornell University and Lit Thinking researchers are working to overcome limitations of ultrawide-bandgap semiconductor material aluminum nitride (AiN) with a grant from DARPA.
The Texas Advanced Computing Center (TACC) at UT Austin chose Sabey Data Centers (SDC Austin) as its colocation partner for the Horizon supercomputer, a National Science Foundation (NSF)-funded Leadership-Class Computing Facility (LCCF).
Sandia National Laboratories and Arizona State University are collaborating on quantum technology, aiming to transform large-scale optical systems into compact integrated microsystems.
Fig. 1: Instead of using typical large optical tables, Sandia is developing acousto-optic device technologies, such as the eight-inch wafer above, that can selectively reflect different colors of light. Photo: Craig Fritz. Source: Sandia National Lab.
Fujitsu and the Center for Quantum Information and Quantum Biology (QIQB) at Osaka University are jointly developing technologies for space-time efficient analog rotation quantum computing architecture.
IBM Research launched its quantum lab in Yorktown Heights, New York.
UCLA’s California NanoSystems Institute, in collaboration with the University of Delaware, Caltech, and MIT, received a $1 million grant from the National Science Foundation (NSF) to advance quantum technologies.
Los Alamos National Laboratory Researchers developed a unified theory of barren plateaus, removing the guesswork of building quantum ML algorithms.
Keysight introduced its Electrical Structural Test bond inspection solution, which incorporates Vectorless Test Enhanced Performance technology to create a capacitive structure between wire bonds and sensor plates. EST can handle throughput of up to 72,000 units per hour and uses marginal retry test, dynamic part averaging test and real-time part averaging test to enhance yield.
Samsung’s automotive LPDDR4X memory was qualified for use with Qualcomm’s Snapdragon Digital Chassis for in-vehicle infotainment (IVI) and advanced driver-assistance systems (ADAS).
CELUS released its new Design Platform, which incorporates AI to allow engineers to find proper components via algorithm. The platform allows engineers to balance functional requirements with electrical, environmental, mechanical and cost constraints.
PQShield and SiFive teamed up to combine the former’s SCA-protected coprocessor PQPlatform-CoPro with the latter’s Essential Care range of CPUs. The partnership will also port PQShield’s cryptographic librairies to SiFive’s Vector-enabled Performance P470 CPUs.
Siemens joined the Global Battery Alliance, which includes corporations, NGOs, academia, and government to drive change in the battery manufacturing value chain. The goal of the GBA is to enhance sustainable energy solutions.
Synopsys released its annual Environmental, Social, and Governance Report, in which the company touted it’s A- score on climate action. The company also touted progress in diversity on its board, and employee satisfaction.
Find upcoming chip industry events here, including:
| Event | Date | Location |
|---|---|---|
| SEMICON Taiwan | Sep 4 -6 | Taipei |
| AI HW and Edge AI Summit | Sep 9 – 12 | San Jose, CA |
| DVCON Taiwan | Sep 10 – 11 | Hsinchu |
| R&D Project Funding: Test Vehicle Innovation Pipeline (TVIP) | Sept 10 | Virtual and Falls Church, VA |
| GSA Executive Forum | Sep 26 | Menlo Park, CA |
| SPIE Photomask Technology + EUVL | Sep 29 – Oct 3 | Monterey, CA |
| Strategic Materials Conference: SMC 2024 | Sep 30 – Oct 2 | San Jose, CA |
| IMAPS 2024: International Symposium on Microelectronics | Oct 1 – Oct 3 | Boston, Massachusetts |
| Rambus Design Summit | Oct 1 | Virtual |
| Memory Users Conference | Oct 1 – 2 | Virtual |
| 2024 OCP Global Summit | Oct 15 – 17 | San Jose, CA |
| DVCON Europe | Oct 15 – 16 | Munich, Germany |
| Hardwear.io Conference & Training | Oct 21 – 25 | Amsterdam, Netherlands |
| CadenceCONNECT: Jasper User Group | Oct 22 – 23 | San Jose, CA |
| Find All Upcoming Events Here | ||
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Hynix’s 1c DRAM isn’t a “10nm” node. It’s the 6th generation of “10nm-class” nodes. i.e. nodes between 10-20nm