Dataflow execution on GPUs; templatized chip design; scanning acoustic microscopy for packaging; data-centric ML compiler for PIM; QPUs with slow interconnects; smartphone EM side channel attacks; memristors for ReRAMs and neuromorphic; thermo-mechanical analysis IC packaging.
New technical papers recently added to Semiconductor Engineering’s library:
| Name of Paper | Research Organizations |
|---|---|
| Kitsune: Enabling Dataflow Execution on GPUs with Spatial Pipelines | NVIDIA, UW-Madison |
| A Vertically Integrated Framework for Templatized Chip Design | USC |
| Recent Progress in Structural Integrity Evaluation of Microelectronic Packaging Using Scanning Acoustic Microscopy (SAM): A Review | Arizona State University and Fraunhofer |
| A Tensor Compiler for Processing-In-Memory Architectures | Univ. of Toronto, Barcelona Supercomputing Center, ETH Zurich, and Max Planck |
| Advantage in distributed quantum computing with slow interconnects | IonQ Inc. and Aalto University |
| Breaking ECDSA with Electromagnetic Side-Channel Attacks: Challenges and Practicality on Modern Smartphones | Fraunhofer AISEC, BSI, TUM |
| Fast prototyping of memristors for ReRAMs and neuromorphic computing | U. of Pisa, U. of Pavia et al. |
| A review of the thermo-mechanical analysis framework for microelectronics packaging: Mechanics, material property determination, and structural considerations | Sungkyunkwan Univ., Korea Institute of Industrial Technology, Korea Univ., Seoul National Univ., and Pukyong National Univ. |
Find more semiconductor research papers here and in the most recent Chip Industry Week in Review.
Leave a Reply