Chip Industry Week In Review

The U.S. Department of Commerce issued a notice of intent  to fund new R&D activities to establish and accelerate domestic advanced packaging capacity. CHIPS for America expects to award up to $1.6 billion in funding innovation across five R&D areas, as outlined in the vision for the National Advanced Packaging Manufacturing Program (NAPMP), with about $150 million per award in each research area.

The U.S. Department of Labor awarded more than $244 million through two grant programs to help modernize, diversify, and expand the registered apprenticeship  system in U.S. industries, including advanced manufacturing and cybersecurity. The agency also awarded more than $39 million in grants to 46 states to boost registered apprenticeship (RA) programs across key industries, including workforce support for CHIPS Act investments.

SEMI foresees OEM sales of semiconductor manufacturing equipment will set a new industry record this year, reaching $109 billion, per its latest Equipment Market Data report.

Applied Materials introduced engineered copper wiring at SEMICON West, using a low-k film to create trenches and then deposit a barrier layer that helps prevent electromigration. The company claims a 33% reduction in thickness of the liner to 2nm, and 25% less line resistance. In addition, the company said an enhanced low-k dielectric material will add structural integrity for thin wiring in 3D stacks.

Onto Innovation will offer a glass substrate suite of equipment, featuring the JetStep X500 panel-level packaging lithography system with hybrid substrate handling capabilities and the Firefly G3 sub-micron automatic metrology and inspection system for panel-level packaging and advanced IC substrates (AICS).

Softbank acquired UK-based Graphcore. Terms of the deal were not disclosed.

JEDEC is nearing finalization of the HBM4 standard, which will double the number of channels per stack compared to HBM3, but with a larger physical footprint.

Fig.1: The buzz is back. A glimpse of the the show floor at this week’s SEMICON West in San Francisco. Source: Semiconductor Engineering

Quick links to more news:

Global
In-Depth
Markets and Money
Education and Training
Security
Product News
Quantum
Events and Further Reading

Global

Innovation, Science, and Economic Development Canada (ISED) will put CAD $120 million (~$88 million) behind FABrIC, an initiative managed by CMC Microsystems that aims to provide financial and technical resources, mentorship, and training for semiconductor businesses, engineers, and scientists in Canada, with a particular focus on IoT.

ISE Labs opened its second U.S. test facility in San Jose, California. The ASE subsidiary will focus on qualification and reliability processes, including environmental, mechanical, electrostatic discharge (ESD), failure analysis, and burn-in.

Dutch photonic chip accelerator PhotonDelta will open an office in Silicon Valley in order to grow European and North American photonic collaborations.

In South Korea, Samsung Electronics plans to establish a “chip ecosystem” with its domestic fabless clients, according to the Korea Times. Meanwhile, Samsung and SK Group are speeding up their efforts to compete in the race to glass substrates, according to the Korea Herald. And Samsung is fulfilling its first client order using its 2nm foundry process and advanced chip packaging service, for Japanese AI company Preferred Networks.

Melexis opened its second wafer testing site in Malaysia.

Soitec is expanding its partnership with Taiwan-based UMC to create the industry’s first 3D-IC solution for RF-SOI, targeted at 5G communications.

Natcast chose AMD President Victor Peng as the industry representative for the Steering Committee of the U.S. National Semiconductor Technology Center (NSTC) Consortium.

The U.S. Department of Energy (DoE) announced $1.7 billion to help convert shuttered or at-risk automotive manufacturing and assembly facilities to EV manufacturing. Eleven facilities in eight states are set to benefit.

In-Depth

Semiconductor Engineering published its Test, Measurement & Analytics newsletter this week, featuring these top stories:

• Delivering On Power During HPC Test
• Digital Twins Find Their Footing In IC Manufacturing
• X-Ray Inspection Becoming Essential In Advanced Packaging

More reporting this week:

• Easing EV Range Anxiety Through Faster Charging
• Changes In Formal Verification

Markets and Money

91 startups raise $2.6B in this Q2 Startup Funding report, with big rounds for AI chips, quantum, interconnects and semi manufacturing.

AMD plans to acquire Silo AI, an AI lab that develops tailored AI models and platforms for enterprises, for approximately $665 million.

Accenture acquired two semiconductor design services providers, Excelmax Technologies and Cientra.

Yole Group issued a handful of new market reports about SiC/GaN growth trajectories; GaAs photonics; CMOS image sensors; microfluidics modules, and magnetic sensors.

AI server orders increased in Q1 and Q2 2024, according to TrendForce. Orders are expected to rise further when NVIDIA’s Blackwell GB200 servers and WoA AI-powered notebooks begin shipping in Q3. Hardware upgrades to AI servers and AI notebooks are driving demand for high-capacitance multilayer ceramic capacitors and boosting prices.

By 2030, more than 50% of shipped vehicles will embed 5G, driven by centralized architectures, digital cockpits, and autonomous capabilities (ADAS L3+), with Qualcomm leading the market, per Counterpoint. Shipments of automotive NAD modules for connectivity in vehicles is likely to triple from 2020 to 2030.

Security

ETH Zurich and TOBB researchers published an analysis of the on-DRAM-die read disturbance mitigation method, Per Row Activation Counting (PRAC).

UC San Diego researchers developed a firmware update that can hide a Bluetooth fingerprint, eliminating the vulnerability they found in 2022 that made it possible to track the device’s user.

CEA-Leti and Smiths Detection developed a detection module, consisting of a CdZnTe semiconductor detector operating at room temperature, for small-angle X-ray diffraction to be integrated into an airport baggage-scanner.

Los Alamos National Laboratory and OpenAI researchers are working on an evaluation study to boost AI safety and biosecurity.

CISPA Helmholtz Center for Information Security launched its first security research yearbook, CISPA Display 2023, including topics such as vulnerabilities in processors, satellite security, and authentication mechanisms to protect against deepfakes.

EU think-tank interface published a comprehensive framework for the assessment of whether cyber defense measures should be put into practice.

The Cybersecurity and Infrastructure Security Agency (CISA) issued a number of alerts/advisories.

Education and Training

The U.S. Department of Energy (DoE)’s Oak Ridge National Laboratory (ORNL) and Japan’s National Institute of Materials Science (NIMS) signed a five-year MoU to boost advanced materials research and manufacturing, including an institutional exchange of staff and scientific and technical information, and leading to symposia and workshops in both countries. UT-Battelle operates ORNL for the DoE.

Siemens granted its simulation equipment to Canada’s Saskatchewan Polytechnic to enhance students’ understanding of multiphysics simulation and provide new opportunities for applied research using digital twins.

Purdue University is offering a free online course, Semiconductor Fabrication 101, in collaboration with Intel, the University of Texas at Austin, and worldwide partners. The self-paced course can be completed in 11 to 15 hours and includes hands-on training using virtual reality fabrication simulation tools.

To help Minnesota companies and public agencies compete for CHIPS Act funding, the University of Minnesota appointed Steven Koester, a professor in the department of electrical and computing engineering, as its first semiconductor officer, reports the Star Tribune.

Product News

Advantest‘s SmarTest 8 system software, used to develop test programs for its V93000 SoC test platform, was assessed Automotive SPICE Capability Level 2 compliant by Kugler Maag Cie of UL Solutions.

Siemens EDA introduced Tessent Hi-Res Chain software, a new test and analysis tool to help increase yields at 5nm and below. The company also updated its NX software, including the addition of a continuous digital thread that connects data from various software for E/E systems development, PCB design, and product lifecycle management, to enable collaboration between electronic and mechanical design teams.

Infineon and Swoboda released the first of their jointly developed high-performance current sensor modules for automotive applications.

Ansys’ System Tool Kit for digital mission engineering and systems analysis is now available in AWS Marketplace and for US government customers.

The MIPI Alliance released the MIPI SoundWire Device Class for Audio (MIPI SDCA) v1.0., enabling standardized mechanisms to interact with host-controllable audio devices, connected via a MIPI SoundWire interface, to simplify audio software architecture and driver requirements.

Vodaphone adopted Keysight’s 5G Network Visibility Solutions to access real-time, end-to-end visibility of subscriber-level traffic across physical, virtual, and cloud infrastructures. And Keysight joined the AI-RAN Alliance, a consortium focused on integrating AI into cellular technology to enhance radio access network (RAN) performance and mobile network capabilities.

Quantum

University of Chicago researchers proposed a way to build a nationwide quantum network by using vacuum beam guides, in which qubits can travel thousands of miles inside small vacuum-sealed tubes.

Oxford Ionics says it has demonstrated a quantum chip that can be built at scale in existing semiconductor factories and has two-qubit gates with fidelities at the 99.97% level and single-qubit operations with 99.9992% fidelity.

Quantum Circuits Inc. introduced a dual-rail superconducting qubit with built-in error detection that minimizes physical sources of noise while maintaining a high level of control. It is built from two resonators that encode a bit of quantum information as a single photon shared between them.

Riverlane uncorked the roadmap for its quantum error correction stack with the aim of creating a system where quantum computers can run one million error-free quantum operations by 2026.

University of Tokyo researchers experimentally proved a genetic algorithm for automatic inverse design of phononic crystal nanostructures, allowing the control of acoustic waves in the material. The approach could be applied to surface acoustic wave devices used in quantum computers, smartphones, and other devices.

Researchers at South Korea’s Center for Van der Waals Quantum Solids at the Institute for Basic Science (IBS) achieved epitaxial growth of 1D metallic materials with a width of less than 1nm, then applied the process to develop a new structure for 2D semiconductor logic circuits by using the 1D metals as a gate electrode of the ultra-miniaturized transistor.

Events and Further Reading

Find upcoming chip industry events here, including:

Upcoming webinars are here.

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