Part two: Problems continue to grow at each new process node, and so do the costs.
Photomasks are becoming more complex and expensive at each node, thereby creating a number of challenges on several fronts.
For one thing, the features on the photomask are becoming smaller and more complex at each node. Second, the number of masks per mask-set are increasing as a result of multiple patterning. Third, it costs more to build and equip a new mask fabrication facility. And finally, mask tool costs are soaring at each node.
To find out what’s required for future masks, Semiconductor Engineering recently conducted an informal poll among several photomask experts. The poll asked experts to come up with a “wish list” of technologies that are required for future mask making. The results were all over the map:
• Most respondents said there is a need for three technologies—actinic inspection, multi-beam mask writers, and new mask metrology tools.
• Other technologies made the list, as well, such as defect-free EUV mask blanks and EUV pellicles. New cleaning systems, repair tools and resists also made the list. And one respondent sees a need for better legacy tools.
• Economic issues are also on the minds of mask makers. One respondent believes that mask makers need to raise their prices as a means to boost their margins.
Part one in this series examined several “wish list” items, such as the economic issues, EUV mask blanks, multi-beam mask writers and inspection. Part two examines at other technologies, including the supply chain, repair, cleaning, metrology and pellicles.
The supply chain
Mask makers want a more robust supply chain. For this, mask experts listed two items on their “wish list.” First, mask makers and their customers want an improved process flow. Second, photomask vendors want their equipment suppliers to develop new tools that support older nodes or at least provide better support for legacy gear.
On the first front, the industry wants to speed up the photomask production process. Basically, a photomask is a master template of a given IC design. In the flow, a chipmaker designs an IC, which is then translated into a file format. Then, a photomask is developed based on that format.
This sounds simple, but mask making is a complex process that follows a series of steps. In the flow, a mask blank is first patterned using an e-beam mask writer. Then, once the mask is patterned, it goes through the following process steps in order—etch, metrology/inspection, repair and pellicle mounting.
Once the mask is developed, it is shipped to the fab. Then, the mask is inserted into a lithography scanner. The scanner projects light through the mask, which in turn patterns the images on a wafer.
This is only part of the story of mask production, however. For years, the mask has been closely tied to lithography. Today, chipmakers are extending 193nm wavelength lithography far beyond what was once considered possible. To deal with the diffraction issues, mask makers must use various reticle enhancement techniques (RETs) on the photomask.
One RET, called optical proximity correction (OPC), is used to modify the mask patterns to improve the printability on the wafer. OPC makes use of tiny assist features on the mask, which are getting smaller and more complex at each node. On top of that, mask makers are moving toward new RET-like schemes, such as inverse lithography technology (ILT). The mask, in turn, is moving from traditional square features to more complex curvilinear features.
Masks also are becoming more complex in other respects. At 180nm, for example, there was an average of 28 masks per mask-set. That has jumped to 60 masks per mask-set at 16nm, according to a recent survey from the eBeam Initiative.
It takes a longer time to fabricate a mask at each node, too. For example, it takes three times longer to make a 22nm mask compared to a 250nm reticle, according to experts. The cycle time is sometimes called the turnaround time (TAT).
What the industry wants is a faster TAT. “The turnaround time on mask verification and repair has been getting much longer below the 28nm node,” said Aki Fujimura, chief executive of D2S. “This problem continues to grow due to the need for aggressive OPC and ILT. This, in turn, gives rise to adoption of non-orthogonal patterns and complex shapes, such as curvilinear mask patterns. Having a way to streamline the flow, from OPC to repaired masks, to reduce the turnaround time can help a mask shop’s competitiveness significantly. Having a unified mask process flow, where resources and turnaround time are not wasted on data conversion would also be great.”
The TAT is a concern for leading-edge masks. But there are also issues for trailing-edge masks as well.
In fact, a surge in demand for various chips and sensors has created a shortage in 200mm fab capacity. This has left chipmakers struggling to procure 200mm equipment for those fabs as demand for chips at these older nodes continues to rise.
At the same time, mask makers are also struggling to obtain legacy tools for older nodes in the mask shop. “The recent resurgence of 8-inch fabs creates the need to extend the life of legacy mask manufacturing tools,” according to one photomask maker who requested anonymity. “However, many equipment companies are paying more attention to wafer fabs, and not to the mask manufacturing infrastructure.”
Some equipment companies, according to the mask maker, are somewhat reluctant to support legacy tools. So, in some cases, the mask makers themselves must support legacy gear. And there are cases where the mask makers must source a number of key parts for a given tool.
New metrology tools
Clearly, photomask makers want to speed up the TAT. Mask writing is one bottleneck in the flow, while other steps are also time-consuming. “You are spending a lot of time with metrology and inspection,” said Thomas Faure, a technical staff member at GlobalFoundries, in a recent interview.
In fact, the total time for inspection and metrology for a mask could run some 18 hours today, which is roughly double the amount of time as compared to several years ago.
Mask metrology, the science of measuring the key parameters on the mask, is challenging. As mask complexity increases, mask makers must take more measurements than ever before. “The measurement numbers per mask are exploding. We may measure the mask at 200 places, but some customers want to measure 5,000 places,” said Naoya Hayashi, a fellow at Dai Nippon Printing (DNP).
In one part of the metrology flow, mask makers are concerned about the critical dimensions (CDs) on the photomask. The tool that measures the CDs is called a critical-dimension scanning electron microscope (CD-SEM).
For complex masks, the CD-SEM needs a boost. To advance the CD-SEM, D2S recently partnered with Advantest to integrate D2S’ wafer plane analysis engine into Advantest’s E3640 line of CD-SEMs. This, in turn, provides two new capabilities for the CD-SEM—mask plane metrology and wafer plane metrology.
Still, mask makers want to conduct more measurements at a faster rate. For this, mask vendors want a more revolutionary tool—a multi-beam e-beam metrology tool.
The problem? Several toolmakers are developing multi-beam systems, but these machines are not geared for mask inspection. The photomask market is too small to get a return-on-investment for multi-beam inspection systems. Instead, these systems are targeted for the larger wafer inspection market.
Meanwhile, inspection involves the process of finding killer defects on the mask. Generally, mask makers use 193nm inspection tools to find defects for both traditional optical and EUV photomasks.
Finding defects on EUV masks are challenging. An EUV mask is a multi-layered stack. And within the stack, the defects are sometimes buried.
In the EUV mask inspection process, some defects in the mask are problematic. They must be identified and repaired. Then, at times, the tool may identify what appears to be a defect, but it is not a real defect—it is a mere nuisance or noise.
So, it’s critical to identify which defects are problematic and which are not. For this, the industry uses a defect review tool called an actinic aerial image metrology system (AIMS).
An AIMS tool is expensive, especially for EUV masks. So, mask makers would like to see a cost-effective alternative to an AIMS tool for EUV. “The cost is quite high,” DNP’s Hayashi said. “It’s quite difficult to get one of the EUV AIMS tools for a merchant mask shop.”
Mask repair and cleaning
Meanwhile, in the flow, the inspection and review process finds the unwanted defects. Then, a mask repair system can repair many of these defects on the fly.
Photomask makers use two types of mask repair technologies—e-beam and nanomachining. Carl Zeiss is the sole supplier of e-beam mask repair tools, while Rave provides nanomachining systems. Both e-beam and nanomachining are complementary technologies.
Mask vendors would like another type of repair technique. “We need to have a gas field ion source repair system for next-generation masks,” DNP’s Hayashi said.
Gas field ion source (GFIS) makes use of helium and hydrogen gases as a means to repair a mask. Hitachi High-Technologies has been developing a GFIS repair system for years. The system is still in the alpha stage.
On top of that, mask makers must also conduct various cleaning steps to remove contaminants, resists and residue from the photomask. “The challenge is to keep the mask clean,” said Brian Grenon, director of sales and marketing for Rave. “This is not only from a particulate standpoint, but also from a molecular contamination standpoint. Molecular contamination is starting to play as big, if not a bigger role, in mask degradation.”
For optical masks, photomask makers generally use cleaning tools that combine a mixture of sulfuric acid and hydrogen peroxide. “The cleaning processes are terrible,” Grenon said. “Typically, it’s wet chemistry. They are still using sulfuric acid and hydrogen peroxide. This process chemistry leaves residues and can degrade the mask.”
Fortunately, there are alternative solutions. For example, Rave’s Eco-Snow subsidiary sells an “all dry” non-contact tool that has several advantages over conventional wet clean systems. Using a CO²-based cryogenic aerosol cleaning technology, the tool is geared for both optical and EUV masks.
Last but not least, the mask manufacturing flow includes what some call the “protect and maintenance” phase. On this front, mask makers want pellicles for extreme ultraviolet (EUV) lithography.
Generally, the industry wants EUV for good reason. Chipmakers plan to extend 193nm immersion lithography to 10nm and 7nm. This will require a multiple patterning scheme, which in turn increases the complexity and cost in the flow. “We have to do something else to bring the cost trajectory back to its normal curve,” said Kelvin Low, senior director of foundry marketing at Samsung Semiconductor.
EUV promises to simply the flow, at least to some extent. “When EUV comes in, it likely will still be in the hybrid mode,” said Dave Hemker, senior vice president and chief technology officer at Lam Research. “Maybe you do EUV and you double pattern it.”
For EUV, pellicles are an important part of the equation. Basically, a pellicle is a thin, transparent membrane that covers a photomask during the production flow. The pellicle prevents particles and contaminates from falling on the mask.
Pellicles for optical masks, which are mature and well understood, are based on a thin polymer material. In contrast, EUV pellicles, which are still in R&D, are a different story.
For example, ASML’s polysilicon-based EUV pellicle, which is just 50nm thick, must withstand an enormous amount of heat. In theory, the pellicle will dissipate the heat. But at those temperatures, there are also fears that the EUV pellicle could deteriorate during processing.
So far, the industry has tested an EUV pellicle with a 40-watt source. Still to be seen, however, is what will happen when the pellicle is exposed to a 250-watt source.
Given the uncertainties with the technology, the industry is debating whether EUV needs a pellicle or not. EUV pellicles, according to most experts, are required for logic. If a particle lands on an EUV mask, the scanner would likely print an unwanted defect on a wafer. “If we have one defect, that means the whole die is gone,” said Banqiu Wu, principal member of the technical staff and chief technology officer for the Mask and TSV Etch Division at Applied Materials.
Memory is a different story. “In the memory side of the business, they switch masks far less often. If you are switching masks far less often, you may have an environment that could exist without a pellicle,” said David Fried, chief technology officer at Coventor.
To solve the problem, the industry is developing a new class of EUV pellicles with promising heat dissipation materials. “There are various competing solutions out there,” said Mark Wylie, product marketing director at KLA-Tencor. “But the whole pellicle question is still interesting. There is still a lot of debate in the industry as to which path the pellicle takes.”
Executive Insight: Aki Fujimura
D2S’ CEO peers into the future of lithography, photomasks, and what happens at 5nm.
Next EUV Challenge: Pellicles
Protecting photomasks at high temperatures is proving difficult and expensive.