Photonic-integrated circuit packaging; V2X communication; efficient LLM inference; statistical BER analysis for chiplets; LLM 3DHI; preventing end-to-end slowdowns in accelerated chip multi-processors; thermal nanoimprint-based dielectric patterning; scalable neuromorphic computing; intrusion detection of DoS attacks on CAN bus.
New technical papers recently added to Semiconductor Engineering’s library:
| Name of Paper | Research Organizations |
|---|---|
| Advanced Optical Integration Processes for Photonic-Integrated Circuit Packaging | Hanyang University |
| Efficient LLM Inference: Core Bottlenecks Imposed By Memory, Compute Capacity, Synchronization Overheads are all you need | NVIDIA |
| Fast and Accurate Jitter Modeling for Statistical BER Analysis for Chiplet Interconnect and Beyond | TSMC |
| A3D-MoE: Acceleration of Large Language Models with Mixture of Experts via 3D Heterogeneous Integration | Georgia Tech |
| RACER: Avoiding End-to-End Slowdowns in Accelerated Chip Multi-Processors | Cornell University, Intel Labs |
| Hybrid Bonding With Polymeric Interlayer Dielectric Layers Patterned by Nanoimprint Lithography | Seoul National University of Science and Technology |
| Neuromorphic Computing: A Theoretical Framework for Time, Space, and Energy Scaling | Sandia National Laboratories |
| CANDoSA: A Hardware Performance Counter-Based Intrusion Detection System for DoS Attacks on Automotive CAN bus | Dumarey Softronix, Politecnico di Torino |
| Research Challenges and Progress in the End-to-End V2X Cooperative Autonomous Driving Competition | Tsinghua, HK University, Stanford, TU Munich et al. |
Find more semiconductor research papers here.
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