Chip Industry Technical Paper Roundup: August 19

Server-scale programmable photonic fabric to interconnect accelerators; massive MIMO signal detection with IMC; microservice-based LLM agents for EDA; power gating in NPUs; test escapes and SDCs severity; memory specialization with LtRAM, StRAM; in-NAND self-encryption; low-latency interconnect.

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New technical papers recently added to Semiconductor Engineering’s library:

Name of Paper Research Organizations
Morphlux: Programmable chip-to-chip photonic fabrics in multi-accelerator servers for ML Cornell University, Lightmatter
Towards Memory Specialization: A Case for Long-Term and Short-Term RAM Stanford, Microsoft
Energy-Accuracy Trade-Offs in Massive MIMO Signal Detection Using SRAM-Based In-Memory Computing University of Illinois at Urbana–Champaign
Silent Data Corruption by 10x Test Escapes Threatens Reliable Computing Google
AutoEDA: Enabling EDA Flow Automation through Microservice-Based LLM Agents Duke University, University of Maryland
FlashVault: Versatile In-NAND Self-Encryption with Zero Area Overhead DGIST, Georgia Tech, POSTECH, Samsung Electronics, Virginia Tech, Korea University
ReGate: Enabling Power Gating in Neural Processing Units University of Illinois at Urbana–Champaign
relOBI: A Reliable Low-latency Interconnect for Tightly-Coupled On-chip Communication ETH Zurich

Find more semiconductor research papers here.



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