Chip Industry Technical Paper Roundup: Sept 16

Analog plus 3D optics for AI inference; neuromorphic memristor; branch privilege injection; IC packaging metrology and material needs; automotive digital twins; thermal vulnerability of 3D-stacked HBM; optimizing LLMs under GPU memory constraints.

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New technical papers recently added to Semiconductor Engineering’s library:

Technical Paper Research Organizations
Analog optical computer for AI inference and combinatorial optimization Microsoft Research, Barclays, University of Cambridge
An Ultra-Robust Memristor Based on Vertically Aligned Nanocomposite with Highly Defective Vertical Channels for Neuromorphic Computing Purdue University,
UT Arlington
Branch Privilege Injection: Compromising Spectre v2 Hardware Mitigations by Exploiting Branch Predictor Race Conditions ETH Zurich
Material Needs and Measurement Challenges for Advanced Semiconductor Packaging: Understanding the Soft Side of Science NIST, NC State University, NREL, ASE, Intel, Innocentrix, Binghamton University
Engineering Automotive Digital Twins on Standardized Architectures: A Case Study McMaster University
On the Thermal Vulnerability of 3D-Stacked High-Bandwidth Memory Architectures NC A&T State University, New Mexico State University
MLP-Offload: Multi-Level, Multi-Path Offloading for LLM Pre-training to Break the GPU Memory Wall Argonne National Laboratory, Rochester Institute of Technology

Find more semiconductor research papers here.



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