DSA of 3D interconnected networks; ESD protection and inter-chiplet signaling; neuromorphic accelerator bottlenecks; memristor-based PIM device; open-source chiplets for HPC, AI; on-current degradation in ultra-scaled NSFETs; formal verification of secure vehicle SW updates; NEMS for HW security in advanced packaging.
New technical papers recently added to Semiconductor Engineering’s library:
| Technical Paper | Research Organizations |
|---|---|
| Directed self-assembly of 3D interconnected networks | MIT |
| Tiny Chiplets Enabled by Packaging Scaling: Opportunities in ESD Protection and Signal Integrity | Arizona State University, University of Minnesota |
| Modeling and Optimizing Performance Bottlenecks for Neuromorphic Accelerators | Harvard University, Politecnico di Torino, Intel, LMU Munich et al. |
| A Comparative Study of Digital Memristor-Based Processing-In-Memory from a Device and Reliability Perspective | Northwestern University, Technion – Israel Institute of Technology |
| Toward Open-Source Chiplets for HPC and AI: Occamy and Beyond | ETH Zurich, University of Bologna |
| On-Current Degradation in Ultra-Scaled Nanosheet FETs with S/D Underlap Doping | Global TCAD Solutions GmbH, TU Wien |
| Towards a Formal Verification of Secure Vehicle Software Updates | Chalmers University of Technology, Volvo |
| Nanoelectromechanical Systems (NEMS) for Hardware Security in Advanced Packaging | University of Florida |
Find more semiconductor research papers here.
Leave a Reply