Intel lifelines; EU firms up chip deal; pros/cons of AI chip exports to China; HW weakness report; 95% failure in GenAI pilots; Air Liquide’s $3.3B buy; Taiwan’s silicon shield erosion; DeepSeek’s new release; Ultra Ethernet; imec’s high-density front-backside wafer connectivity.
The EU’s tariffs on semiconductors will not exceed 15%, according to Trump’s latest trade deal. In addition, the EU committed to purchasing at least $40 billion worth of U.S. AI chips as well as other investments. [FAQ is here.]
Lifelines for Intel:
The U.S. government’s decision to allow exports of NVIDIA H20 chips and similar AMD chips, along with the related 15% export tax is spurring much debate. Among the opinions:
Versus:
Further muddying the waters, NVIDIA is developing a more powerful AI chip for China, tentatively known as B30A, reports Reuters.
French industrial gas giant Air Liquide said it will buy Korea’s DIG Airgas for €2.85 billion ($3.34 billion). The deal is expected to close in 1H 2026.
CWE updated its Most Important Hardware Weaknesses List, reflecting significant changes in the landscape since the 2021 update.
A report from MIT’s NANDA initiative reveals that 95% of generative AI pilots at companies are falling short of their goals. Meanwhile, DeepSeek released an update to its former agentic AI model that surpasses the R1 on key benchmarks.
Entegris is planning a $700 million investment in R&D projects and capital spending for its Materials Solutions and Advanced Purity Solutions divisions.
imec outlined strategies and real-fab examples for reducing the overall environmental footprint of the semiconductor industry, among the highlights:
Financial releases this week: Analog Devices, Keysight, JCET, and Nordson.
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Semiconductor Engineering published its Manufacturing, Packaging and Materials newsletter this week, featuring these top stories:
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China’s top EDA company, Empyrean, said it boosted design tools for memory chips and panel displays by adding a “clone group” function to the layout editor, which helps “quickly and accurately complete the layout design of identical units,” per SCMP.
Kioxia developed a prototype of a flash memory module for large-scale AI models with a capacity of five terabytes and bandwidth of 64 GB/s, enabling advanced AI processing at the edge.
Keysight has completed the industry’s first PSA Certified Level 4 security evaluation for Silicon Labs’ Series 3 Secure Vault.
Infineon’s Bluetooth MCU and SDK are verified as part of the Engineered for Intel Evo laptop accessory program.
Lightmatter said it achieved a world-first 16-wavelength bidirectional link on single-mode optical fiber, marking an 8X improvement in bidirectional wavelengths per fiber and paving the way for next-gen AI data centers.
Imec explains why advances in wafer-to-wafer hybrid bonding and backside technologies move CMOS 2.0 from concept to reality, allowing more options in scaling.
Researchers at ETH Zurich, Broadcom and others published Ultra Ethernet’s Design Principles and Architectural Innovations, an overview of the new protocol supporting high-performance AI and HPC networking over Ethernet.
Google published “Silent Data Corruption by 10x Test Escapes Threatens Reliable Computing,” detailing the severity of test escapes and SDCs caused by them.
Researchers at KAUST, AIXTRON SE, and National University of Singapore have fabricated 2D-materials-based microchips through a multi-project wafer tape out in the European 2D Experimental Pilot line.
LLNL researchers have developed “smart” windows with vertically aligned carbon nanotubes that can modulate the transmission of near-infrared light, either absorbing infrared light and blocking heat from the sun or letting the infrared light through. This discovery could potentially cut costs and energy usage in modern infrastructure.

Fig. 1: Vertically aligned carbon nanotubes. Credit: Jeremy Gardner/LLNL
Rice University materials scientists developed a transfer-free method to grow ultrathin semiconductors on electronics. They used chemical vapor deposition (CVD) to grow tungsten diselenide, a 2D semiconductor, directly onto patterned gold electrodes.
Find much more semiconductor research in SE’s technical paper library, with this week’s new additions here.
Two Chinese automakers have rolled out 5-minute charging technology for EVs, something U.S. companies have not yet done.
McKinsey released a report on automotive product development, including faster time to market analysis, in addition to a report on how autonomous technologies have the potential to transform lives.
Global NEV sales (BEVs, PHEVs, FCVs) reached 4.868 million units in the second quarter of 2025, up 30% YoY. BYD remains the leading BEV brand with an 18% market share, according to TrendForce.
Automakers Xpeng and Nio cut their respective ties with Nvidia and have instead developed their own chips for smart driving.
An Intel researcher discovered online infrastructure holes that exposed the personal details of more than 270,000 staff members.
SEMI launched a free, industry-tailored cybersecurity assessment, The Standardized Semiconductor Cybersecurity Assessment, designed specifically for the semiconductor supply chain.
The UK government dropped its demand that Apple allow law enforcement officials backdoor access to American customer data.
AI is helping hackers create effective malware, according to reporting from The Economist.
Fasoo announced the adoption of its CAD file security solutions built for semiconductor supply chain collaboration.
Recent security research:
CISA issued a number of alerts/advisories.
Morgan State University’s New Silicon Initiative prepares students for careers in hardware engineering and silicon chip design. Students are using Intel 16 and the Cadence Tool Flow for an academic chip tapeout.
The Cornell Nanoscale Science and Technology Facility launched a free VR youth outreach model to expose students to microchip fabrication.
The Illinois Semiconductor Workforce Network offered the Semiconductor Fabrication Training Program at the University of Illinois Chicago.
University of Chicago received a $3 million grant from the U.S. National Science Foundation to boost American design and manufacturing of advanced 3D chip technologies via the NSF ACE-3D Chip Design Hub.
Vietnam and France’s Dassault Systèmes partnered to boost semiconductor talent and innovation with a focus on AI-driven digital twins, integrated modeling and simulation, and advanced manufacturing.
Chiba University researchers published, Emergence of a zero-bias peak on the MgO/Fe(001) surface induced by the adsorption of a spin-1/2 molecule, achieving stable isolated quantum spins on magnetic substrates.
Mitsui, QSimulate, and Quantinuum launched QIDO, a quantum-integrated chemistry platform aimed at faster drug and materials discovery. Quantinuum also released a new open-source software designed for application developers.
IQM Radiance will integrate its 20-qubit upgradeable full stack superconducting quantum computer into Oak Ridge National Laboratory (ORNL)’s HPC systems to advance hybrid quantum-classical application development.
Rigetti and Montana State University signed an MoU to advance quantum computing research and innovation and the university launched its new research and innovation center, QCORE, dedicated to quantum and photonic systems integration.
Oxford Ionics installed the QUARTET (Quantum Advantage-Ready Trapped-ion Exploration Testbed) quantum computer at the UK’s National Quantum Computing Center Harwell data center.
Upcoming webinars are here, including:
Three on-demand webinars showcase Amkor’s manufacturing buildout in Peoria, Arizona: chemical handling, water safety, and air quality.
Find upcoming chip industry events here, including:
| EVENTS | Date | Location |
|---|---|---|
| IEEE Hot Interconnects | Aug 20 -22 | Virtual |
| Hot Chips 2025 | Aug 24 – 26 | Stanford/Palo Alto |
| SNUG Vietnam | Aug 26 | Saigon, Vietnam |
| ADAS & Autonomous Vehicle Technology Summit | Aug 27 – 28 | San Jose, CA |
| SEMICON India | Sep 2 – 4 | New Delhi |
| Synopsys Processor IP Summit 2025 | Sep 3 | Sunnyvale, CA |
| International Semiconductor Executive Summit: Europe 2025 | Sep 2 – 4 | Dresden, Germany |
| TECHCON 2025: Semiconductor Research Corporation | Sep 7 – 10 | Austin, TX |
| IEEE European Solid-State Electronics Research Conference | Sep 8 – 11 | Munich, Germany |
| SEMICON Taiwan | Sep 8 – 12 | Taipei |
| AI Infra Summit (formerly AI Hardware & Edge AI Summit) | Sep 9- 11 | Santa Clara, CA |
| Design & Verification Conference: DVCON Taiwan | Sep 9 | Hsinchu, Taiwan |
| RISC-V Automotive Conference 2025 | Sep 9 | Munich, Germany |
| European Microelectronics & Packaging Conference (EMPC 2025) | Sep 16 – 18 | Grenoble, France |
| SPIE Photomask Technology + EUVL | Sep 22 – 25 | Monterey, CA |
| GSA U.S. Executive Forum | Sep 23 | Menlo Park, CA |
| Microelectronics UK | Sep 24 – 25 | London |
| TSMC 2025 North America OIP Ecosystem Forum | Sep 24 | Santa Clara, CA |
| CASPA 2025 Annual Conference | Sep 27 | Santa Clara, CA |
| IMAPS Symposium 2025: International Symposium on Microelectronics | Sep 29 – Oct 2 | San Diego, CA |
| Find all events here. | ||
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