Chip Industry Week In Review

SE Asia tariff pressure; 1:1 import idea; H1-B visa fee chaos; EU 300mm Si photonics; high-NA EUV litho; Nvidia-OpenAI $100B/GW deal; TSMC 3D-IC partnerships, 3nm tape-outs; waveguide fab; Brewer AZ innovation center; microfluidics cooling; rad-hard FPGAs; MIPI auto SerDes chipset; magnetic transistor; large-scale Si quantum.

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U.S. Trade Representative Jamieson Greer warned Southeast Asian semiconductor manufacturers that they must shift production to the U.S. or face new punitive tariffs, reports the South China Morning Post. President Trump previously floated a 100% tariff on imported chips. Malaysia and other regional economies are offering large concessions and promises of U.S. goods purchases in hopes of securing a deal before Trump’s visit to Kuala Lumpur in October.

The Trump administration also is considering a policy that would require U.S. chip companies to maintain a 1:1 ratio between the number of semiconductors they manufacture domestically and the number they import, according to the Wall St. Journal. Companies could pledge to reach the target and be given time to achieve it. If they fail to do so, a high tariff would be imposed.

SEMI Americas President Joe Stockunas released a statement regarding a new $100,000 U.S. H1-B visa fee. Reuters reported that it is causing Silicon Valley companies to consider moving jobs overseas.

The EU Commission selected the STARLight consortium, led by STMicroelectronics, to advance 300mm silicon photonics technology through 2028. The project brings together 24 companies and universities from 11 countries to establish a high-volume manufacturing line and develop photonic integrated circuits targeting datacenters, AI clusters, telecommunications, and automotive applications.

imec announced two major breakthroughs in single-patterning high-NA EUV lithography, achieving 20nm pitch line structures with 13nm tip-to-tip dimensions for damascene metallization, and it demonstrated ruthenium lines at 20nm and 18nm pitch using a direct metal etch (DME) process. The results, presented at the 2025 SPIE Photomask Technology + EUV Lithography Conference, include a 100% electrical test yield for the 20nm pitch DME structures, marking a key milestone in extending high-NA EUV toward sub-2nm logic nodes.

Chiplets:

  • The Open Compute Project published part two in its blog series about an open framework for multi-vendor chiplet virtual prototyping, presenting a draft proposal to initiate industry-wide dialog and collaboration.
  • Baya Systems demonstrated interoperability between its chiplet WeaveIP fabric and Tenstorrent’s RISC-V-based TT-Ascalon processor portfolio. Baya also joined Tenstorrent’s Open Chiplet Atlas Architecture (OCAA).

Data centers:

  • OpenAI and Nvidia announced a strategic partnership to deploy 10 gigawatts of Nvidia systems. Nvidia will invest up to $100 billion in OpenAI as each gigawatt is deployed, starting H2 2026 on its Vera Rubin platform.
  • OpenAI, Oracle, and SoftBank announced five new U.S. AI data center sites under Stargate. OpenAI’s projects could cost $850 billion, per CNBC.
  • Alibaba announced plans for multiple global data centers and said its cloud platform will be integrated with Nvidia’s physical AI software stack.
  • CSIS reported that while AI is placing pressure on the electric grid, AI tools can enable grid operators, utilities, and consumers to reduce costs and improve performance.

TSMC held its Open Innovation Platform (OIP) conference in Santa Clara, spurring numerous announcements:

  • Synopsys is collaborating with TSMC to enable 2D/3D-IC design workflows for advanced nodes, accelerating AI, high-speed data communications, and advanced computing.
  • Siemens EDA is collaborating with TSMC to speed up 3D-IC and AI-driven circuit and systems design, including improvements on design rule check productivity, and various tools gained
  • Cadence announced AI design flows supporting TSMC’s N2 and A16 technologies; 3D-IC solutions to support TSMC 3DFabric die stacking configurations and advanced packaging; and design-in ready IP for HBM4 and LPDDR6/5x on TSMC N3P.
  • Ansys tools are enabling an AI-assisted optimization workflow to shorten design cycle times on TSMC’s compact universal photonic engine (COUPE) platform, and various Ansys tools were certified for a range of nodes.

TSMC 3nm (N3) process tapeouts:

  • Cadence taped out its IP subsystem for the 32Gbps UCIe advanced package on TSMC 3nm, supporting all UCIe data transfer rates from 4Gbps to 32Gbps.
  • Alphawave Semi taped out its 64 Gbps UCIe die-to-die IP subsystem on TSMC 3nm, claiming the first of its kind at that node. The achievement doubles bandwidth density over prior UCIe generations and targets chiplet-based AI, XPU, and data center architectures, promising improved power efficiency and scalability.
  • Credo launched 224G PAM4 SerDes IP on TSMC 3nm, aimed at next-gen AI, cloud computing, and hyperscale applications.

 Fig. 1: Gen3 UCIe IP subsystem. Source: Alphawave Semi

Quick links to more news:

Global
In-Depth
Markets and Money
Product News
Security
Automotive
Research
Quantum
Education and Training
Events and Further Reading


Global

Asia/Middle East:

  • Applied Materials and GlobalFoundries partnered to advance photonics, and will build a waveguide fab at GF Singapore targeting high-volume production of optical components for AR glasses.
  • Synopsys opened a 455,000 square-foot R&D facility in Bengaluru, India, to mark 30 years in the country. The focus is on EDA, IP, verification, and system design solutions.
  • CSIS reported on emerging semiconductor clusters in India, including Bengaluru, Karnataka, Chennai-Hyderabad Corridor, Northern and Eastern Nodes, and Gujarat. CNBC provided an overview of Indian government investments to date.
  • The Asian Institute of Technology, Thailand, and Vellore Institute of Technology, India, entered a five-year strategic partnership aimed at education, research, and emerging technologies.
  • The UAE’s Technology Innovation Institute and Nvidia launched a joint lab for AI and robotics, called the TII-NVAITC (NVIDIA AI Technology Center).

Americas:

  • Brewer Science opened the Arizona Innovation Center in Chandler to accelerate research collaboration, product development, and customer engagement. The facility strengthens proximity to U.S. semiconductor customers and talent.
  • Northrop Grumman opened its Microelectronics Center to external aerospace and defense companies, enabling them to access the company’s three U.S. government-accredited semiconductor manufacturing facilities.
  • Taiwan’s E&R Engineering launched a U.S. subsidiary in Phoenix, Arizona, and will establish laser and plasma demo labs in Phoenix and Portland, Oregon, by 2026, enabling local sample testing and process parameters fine-tuning to shorten development cycles and speed time-to-market.

Europe/UK:

  • Innovate UK announced a £10 million (~$13.3M) fund to boost UK semiconductor innovation from lab to market, benefiting companies such as Paragraf, which develops energy-efficient ICs using graphene.
  • Lufthansa Cargo teamed up with DSV on a pilot project to transport highly sensitive semiconductor production machinery from Japan to Germany.
  • OpenAI for Germany was launched, bringing SAP’s enterprise applications expertise and OpenAI’s AI technology to Germany’s public sector.

In-Depth

Semiconductor Engineering published its Systems and Design newsletter this week, featuring these top stories:

Plus:

More reporting this week:


Markets and Money

Funding:

  • Emerging out of stealth, Corintis raised a $24 million Series A to address the AI cooling bottleneck. With Microsoft, it successfully used a microfluidics approach that brings liquid coolant directly inside the silicon.
  • Empower Semiconductor secured more than $140 million in Series D to support high-volume production and next-gen innovation in power delivery solutions for AI processors.
  • Belfort, a KU Leuven spin-off, closed its $6 million seed round and launched a hardware accelerator for encrypted compute.
  • Morse Micro closed its Series C, raising AUD $88 million (~$57.7M) to scale production of its Wi-Fi HaLow chips and support the shift toward IoT 2.0.
  • InCountry raised $10 million and launched AgentCloak aimed at AI agent data protection.
  • IntelliEPI IR received a Research Award Match Program award of $100,000 from the City of Richardson, Texas for its infrared technology, following a $2 million SBIR Phase II grant from the U.S. Department of Defense.
  • Yerico Manufacturing received a Texas Semiconductor Innovation Fund (TSIF) grant of $1.3 million for its semiconductor equipment materials and services facility in Elgin.

Partnerships/deals:

  • Siemens EDA is collaborating with ASE to develop 3Dblox-based workflows for the ASE VIPack platform using its Innovator3D-IC solution, certified for the 3Dblox standard.
  • Infineon and ROHM signed an MoU to collaborate on packages for SiC power semiconductors used in applications like on-board chargers, photovoltaics, energy storage systems, and AI data centers.
  • SCREEN Semiconductor Solutions and IBM inked a deal to co-develop wafer cleaning processes for High-NA EUV lithography, extending their earlier collaboration on nanosheet device technology.
  • onsemi will acquire the rights to Aura Semiconductor’s Vcore power technology to boost AI data center capabilities with differentiated intelligent power solutions.
  • Space Forge and United Semiconductors will jointly develop supply chains for space-grown semiconductor materials aimed at quantum computing, power electronics, sensors, and display markets.

Intel reportedly approached Apple to discuss a possible investment and expanded cooperation, though talks are described as preliminary and may not yield an agreement, says Bloomberg.

NVIDIA is reportedly pressing suppliers of its Vera Rubin AI server racks to raise HBM4 speeds to 10 Gbps per pin, as it faces competition from AMD’s upcoming MI450 Helios platform in 2026, says TrendForce. While feasibility remains uncertain, SK hynix is expected to retain its lead as the largest HBM4 supplier in 2026, with Samsung and Micron’s shares hinging on product maturity and qualification progress.

In its Q4 earnings call, Micron said it secured its CHIPS Act grant and will partner with TSMC for manufacturing the base logic die for HBM4E memory, reports the Economic Times. (Listen to the call here.)

More reports: High-capacity storage, NAND Flash, DRAM prices, and si photonics and co-packaged optics.


Product News

Arteris’ FlexGen smart NoC IP was licensed by NanoXplore to develop state-of-the-art, radiation-hardened FPGAs for aerospace.

Fig. 2: SoC physical layout including subsystems and NoCs. Source: Arteris

Siemens EDA released Tessent IJTAG Pro software to speed up 2.5D/3D-IC design and test. It transforms IJTAG (IEEE 1687) input/output by enabling parallel operations of the traditionally serial operation, and provides read and write access to custom hardware. The company also added AI to Simcenter Testlab to reinvent modal testing and analysis processes.

Fig. 3: A chip concept for Tessent IJTAG Pro. Source: Siemens.

DEEPX selected Rambus LPDDR5/5x Controller IP as the memory solution for its AI processor.

Infineon provided its CoolGaN power transistors to Universal Microelectronics for its new 250 W adapter for networking Power over Ethernet applications.

Cadence Molecular Sciences (OpenEye) launched ROCS X, an AI-enabled virtual screening solution that allows scientists to conduct 3D searches of trillions of drug-like molecules. Also, Cadence’s Virtuoso Studio IC23.1 ISR16 is now available for download.

Manufacturing:

  • proteanTecs validated its IP-based health and performance monitoring technology on TSMC’s 2nm (N2P) process node, confirming it as silicon-proven. The company’s Hardware Monitoring System was integrated into a customer test chip for high-performance applications.
  • Bruker’s EVOQ DART-TQ+ mass spectrometry system earned the My Green Lab ACT Ecolabel, achieving the lowest Environmental Impact Factor among triple quadrupole instruments as of September 2025.
  • Nordson Electronics Solutions announced that its ASYMTEK conformal coating systems are now fully compatible with actnano’s PFAS-free Advanced nanoGUARD coatings.
  • Via Automation unveiled two agentic AI platforms aimed at enabling self-healing factories. Early results suggest tools can cut unplanned downtime by 30% to 40%, reduce maintenance costs by 15% to 20%, and extend asset life by 25%.
  • iDEAL Semiconductor selected Polar Semiconductor to manufacture its ultra-efficient SuperQ silicon power devices.

Mobile/satcom:

  • MediaTek launched Dimensity 9500 for flagship 5G smartphones, adopting a third-gen All Big Core CPU design, combining a 4.21GHz ultra core, three premium cores, and four performance cores, with four-lane UFS 4.1 storage.
  • Qualcomm released the Snapdragon 8 Elite Gen 5 mobile SoC with on-device agentic AI. Its 3rd Gen Oryon CPU boosts performance by 20%; a new Adreno GPU enhances graphics-rich gaming by 23%; and a Hexagon NPU offers 37% faster performance.
  • Qorvo released a Ku-band beamformer IC designed for terminals that support time-division duplexing in compact and power-sensitive SATCOM applications.

Security

MITRE opened registration for its 2026 Embedded Capture the Flag (eCTFTM) Competition, a semester-long program designed for high school and college students to develop cybersecurity skills and strengthen the nation’s technical workforce.

Infineon provided its OPTIGA Trust M security solution to Thistle Technologies for its new cryptographic protection for on-device AI models.

Vorago announced its VA41630 radiation-hardened MCU was certified to the Defense Logistics Agency’s Qualified Manufacturers List (QML).

Recent research:

  • Revisiting virtual memory support for confidential computing environments (Univ. of Oxford, Univ. of Southampton)
  • SLasH-DSA: Breaking SLH-DSA Using an Extensible End-To-End Rowhammer Framework (Univ. of Luebeck, Google, Azure Research, Microsoft)
  • Robust Anomaly Detection Under Normality Distribution Shift in Dynamic Graphs (Kyoto Univ.)

CISA issued a number of alerts/advisories.


Automotive

The MIPI Alliance announced the first installation of an automotive-grade SerDes chipset based on its MIPI A-PHY specification by a global automotive OEM. This marks the first industry-standardized automotive SerDes solution to enter mass production.

The automotive semiconductor market will soar from $68 billion in 2024 to $132 billion in 2030, growing at a rate five times faster than the automotive market itself, per Yole Group.

Brookhaven National Lab researchers created a new nitrogen-doped catalyst made from a mix of five metals: platinum, cobalt, nickel, iron, and copper. High-entropy intermetallic materials are stable, ideal for extreme environments and heavy-duty vehicles.

Sakuu partnered with International Battery Company on dry-process production of current and next-gen battery and supercapacitor solutions.


Research

MIT engineers built a magnetic transistor using chromium sulfur bromide, which combines semiconducting and magnetic properties. This approach could enable more compact, energy-efficient circuits and open pathways to new computing architectures, including in-memory computing for AI.

More materials innovations:

  • TU Wien researchers succeeded in manufacturing a silicon-germanium (SiGe) transistor using an oxide layer that insulates the semiconductor, helping it function at extremely low temperatures which makes it ideal for quantum chips.
  • National University of Singapore researchers observed a doping-tunable charge density wave in a 2D semiconductor, Chromium selenide, extending the CDW phenomenon from metals to doped semiconductors.
  • The DoE’s National Energy Technology Laboratory pioneered a laser technology to provide lab-quality detection and analysis of rare earth elements in the field.

Berkeley’s Lab’s bottom-up nanowire innovation from almost 20 years ago provides an alternative path to the energy-efficient chips that power modern smartphones, laptops, and AI.

Georgia Tech and Vanderbilt University researchers built a microscopic lung-on-a-chip that has a built-in immune system. The innovation will allow researchers to study how the lung responds to threats.


Quantum

Large-scale quantum computer developments:

  • imec and Diraq demonstrated that industrially made silicon quantum dot qubits consistently show error rates that surpass the values needed for quantum error correction, opening the door to large-scale silicon-based quantum computers.
  • Researchers at Lawrence Livermore National Laboratory, UC Berkeley, UC Riverside, and UC Santa Barbara miniaturized quadrupole ion traps with 3D printing, a breakthrough toward building a large-scale quantum computer.
  • IonQ, with research support from the Air Force Research Lab (AFRL), successfully demonstrated the frequency conversion of photons from visible wavelengths used to interface with trapped barium ions, into telecom wavelengths on a prototype system, paving the way for interconnecting quantum computers over vast distances using the existing fiber optic infrastructure.

Caltech physicists created the largest qubit array ever assembled, featuring 6,100 neutral-atom qubits trapped in a grid by lasers.

Finland’s IQM Quantum Computers and Taiwan’s Scientek signed a strategic reseller agreement following the installation of the IQM Spark full-stack superconducting quantum computer at Taiwan Semiconductor Research Institute.


Education and Training

Lam Research and Portland Community College collaborated to create a new microscopy technician training program.

 National Science Foundation (NSF) grants:

  • UC San Diego won a three-year, almost $1 million grant for a new training program aimed at preparing community college students for entry-level careers in semiconductor manufacturing and nanotechnology.
  • Texas Tech University received $2 million to help students better prepare to enter the semiconductor workforce. The S-STEM grant will provide scholarships to at least 36 ECE students across three cohorts.
  • The University of Rochester and Boise State University won a $2.1 million grant, supported by funding from Micron, to empower K–12 STEM educators to become leaders in the semi industry in New York and Idaho.

Purdue University celebrated the opening of its Spatial Computing Hub using Apple Vision Pro technology.

Oklahoma State University’s School of Electrical and Computer Engineering is running a program that will immerse high school and community college educators in photonic microchip fabrication.

Participants at Argonne National Laboratory’s first AI STEM Education Summit learned about how AI is changing scientific discovery and the impact this has on STEM learning.

Bosch asked leaders at Sierra College in Roseville, California, to expand its mechatronics program to provide workers for the former TSI Semiconductor fab, which Bosch acquired in 2023. The company has been retooling the facility and will begin manufacturing in 2026. Many TSI employees stayed on, but more are needed, per the Sacramento Bee.


Events and Further Reading

Find upcoming chip industry events here, including:

EVENTS Date Location
CASPA 2025 Annual Conference Sep 27 Santa Clara, CA
IMAPS Symposium 2025: International Symposium on Microelectronics Sep 29 – Oct 2 San Diego, CA
WISH Conference: Women in Semiconductor HW Oct 1 San Jose, CA
Simulation World Detroit Oct 1 – 2 Plymouth, MI
SEMICON West Oct 7 – 9 Phoenix, AZ
AutoSens Europe Oct 7 – 9 Barcelona
Rambus Design Summit Oct 8 Virtual
Connected Equipment Summit Oct 9 Chandler, AZ
OCP Global Summit Oct 13 – 16 San Jose, CA
IEEE’s Physical Assurance and Inspection of Electronics (PAINE) Oct 14 – 16 Denver, Colorado
Synaptics Tech Day 2025 Oct 15 San Jose, CA
Infineon’s Oktobertek Oct 16 Silicon Valley
IEEE/ACM International Symposium on Microarchitecture: MICRO 2025 Oct 18 – 22 Seoul, Korea
SPIE Optifab 2025 Oct 20 – 23 Rochester, NY
Semiconductor Traceability and Provenance Workshop (NIST) Oct 21 Gaithersburg, Maryland
RISC-V Summit North America Oct 22 – 23 Santa Clara, CA
CadenceConnect: Photonics and Quantum Technologies Oct 22 – 23 San Jose, Ca/ Virtual
ICCAD 2025: International Conference on Computer-Aided Design Oct 26 – 30 Munich, Germany
Jasper User Group 2025 Oct 29 – 30 San Jose, CA
Find all events here.

Upcoming webinars are here.


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