Knowledge Center

Knowledge Center

Power Switching

Controlling power for power shutoff


Insertion of power switch cells is a necessity for on-chip power shut-off. Power switch cells can be inserted in a column or a ring fashion.

EDA tools may be able to automatically insert the power switch cells for the designer or they can manually insert these constructs. Power switches are also inserted during the floorplanning or prototyping stage of the implementation flow.

The number and size of the power switches that are inserted depend heavily on the design’s physical characteristics. Generally, the larger the PSO power domain area, and the more logic and macros in the PSO power domain area, the more power switches are needed.

The goal is to have the true optimal number of power switches to satisfy IR drop and current density requirements. Too many power switches leads to wasted area, but too few power switches creates excessive IR drop and risks having too much current (rush current) going through each power switch during wakeup.

Some power switches have built-in buffers/delays that accomplish two things: first, they control the skew of the enable signal of the power switch; and second, they introduce a delay when the enable signal traverses the power switch array.

It may be desirable to introduce a delay, because turning on the PSO power domain causes a large current to be drawn by the domain, causing a current spike or rush current. Introducing a delay between the times when each power switch turns on will spread out the turn-on time of the PSO domain, thereby reducing the current spike.

Another method for reducing the current spike is to turn on the power within the domain in stages over time.

It is also desirable to design the power switches in groups of cells and turn them on and off one group at a time. This way, the last group of power switches at the end of the shut-off sequence, or the first group of power switches at the beginning of the power-on sequence, will handle the large current instead of a single power switch.

In many designs, switches are used in a configuration called “mother-daughter” pair. These switches have multiple enable pins; typically, the smaller switch is turned on first to get the voltage up to 95 percent, then the bigger switch is turned on to reduce the IR drop.

Page contents originally provided by Cadence Design Systems

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